Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of...
Patent
1996-03-28
1998-06-16
Niebling, John
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
438341, 438933, 257198, 257591, 257592, 257593, H01L 21331
Patent
active
057669996
ABSTRACT:
A SiGe alloy film containing electrically active impurity in a concentration higher than the intrinsic base layer is formed on the eaves-structured polycrystalline silicon film for base electrode. After that, SiGe only just under the opening is removed completely by dry etching under a condition that etching speed of SiGe is faster than that of Si, and subsequently the intrinsic base layer is formed.
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People et al., "Calculation Of Critical Layer Thickness Versus Lattice Mismatch For Ge.sub..times. Si.sub.1-x /Si Strained-layer Heterostructures", Appl. Phys. Lett., vol. 47(3):322-324, (1985).
Sato et al., "A Super-Aligned Selectively Grown SiGe Base (SSSB) Bipolar Transistor Fabricated By Cold-Wall Type UHV/CVD Technology", IEEE Transactions on Electron Devices, vol. 41(8):1373-1378, (1994).
NEC Corporation
Niebling John
Pham Long
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