Coating processes – Direct application of electrical – magnetic – wave – or... – Electrostatic charge – field – or force utilized
Reexamination Certificate
2001-09-27
2003-07-29
Talbot, Brian K. (Department: 1762)
Coating processes
Direct application of electrical, magnetic, wave, or...
Electrostatic charge, field, or force utilized
C427S097100, C427S130000, C427S304000, C427S547000, C427S550000, C427S598000
Reexamination Certificate
active
06599583
ABSTRACT:
The invention relates to a method to form a plurality of conductive pathways inside a through hole disposed on a printed circuit board.
Referring to
FIG. 1
, multilayer circuit substrate
10
is formed from individual substrates
12
,
14
, and
16
which are separated by insulating layers
18
and
20
. Interlayer interconnections on printed circuit board patterns are made by via holes when the holes are in the same substrate. For example, via hole
60
in substrate
12
connects the circuitry on surface
22
with circuitry on surface
24
. Connections between conductive patterned layers on different substrates are made by through (the layers) holes. A single through hole can make connections between a number of patterns on different layers. Plated through hole
40
electrically connects conductor
42
on surface
22
with conductor
44
on surface
26
, conductor
46
on surface
26
, and conductor
48
on surface
32
.
In order to insulate circuitry on surfaces
28
and
30
from through hole
40
, guard bands
50
and
52
are disposed around plated through hole
40
on surfaces
28
and
30
, respectively. These guard bands allow for the imperfect positioning and mis-alignment of the hole relative to the conducting patterns on surfaces
28
and
30
. Guard bands
50
and
52
are formed from a dielectric material. Referring to
FIG. 2
, a top view of substrate surface
60
shows a plurality of conductors
64
each of which are electrically insulated from surface
60
by a plurality of guard bands
62
.
Using prior art technology, multiple sets of inter-layer interconnections require multiple through holes. These multiple through holes and the associated guard bands can require a large amount of space on a crowded circuit board. However, for high resolution (high density) printed wiring boards the through holes must be small. For a high density board the spacing and the hole sizes become very small.
The present invention comprises a method for making segmented through holes in a printed circuit board. A mixture of a printing ink and magnetic particles is applied to the walls of a through hole disposed in a multilayer circuit board. The circuit board is then subjected to an energy field to form the ink into a segmented pattern on the walls of the through hole.
When using a conductive ink, the segmented pattern formed on the walls of the through hole comprises a plurality of electrically conductive pathways. When using a plating resist ink, the patterned through hole is then plated to form a plurality of electrically conductive pathways. When using an etch resist ink, the through hole is plated prior to application of, and segmentation of, the ink/magnetic particle mixture. After forming the segmented pattern on the walls of the through hole, the through hole is then etched to form a plurality of electrically conductive pathways.
REFERENCES:
patent: 3873756 (1975-03-01), Gall et al.
patent: 4544577 (1985-10-01), May
patent: 4830880 (1989-05-01), Okubi et al.
patent: 5208068 (1993-05-01), Davis et al.
patent: 5389408 (1995-02-01), DeVolk
Hayes & Soloway P.C.
Talbot Brian K.
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