Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Patent
1997-12-22
2000-07-25
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
438747, 438753, 438756, H01L 21302
Patent
active
060936584
ABSTRACT:
Disclosed is a method for making reliable interconnect structures on a semiconductor wafer having a first dielectric layer. The method includes plasma patterning a first metallization layer over the first dielectric layer. Forming a second dielectric layer over the first metallization layer and the first dielectric layer. Forming a plurality of tungsten plugs in the second dielectric layer, such that each of the plurality of tungsten plugs are in electrical contact with the first metallization layer. Plasma patterning a second metallization layer over the second dielectric layer and the plurality of tungsten plugs, such that at least a gap over at least one of the tungsten plugs is not covered by the second metallization layer and a positive charge is built-up on at least part of the second metallization layer. The method further includes exposing the semiconductor wafer to an electron dose that is configured to neutralize the positive charge that is built-up on the at least part of the second metallization layer. The neutralizing is thus configured to substantially prevent tungsten plug erosion.
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Bothra Subhas
Liang Victor C.
Sur, Jr. Harlan Lee
Philips Electronics North America Corporation
Utech Benjamin L.
Vinh Lan
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