Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2001-03-27
2003-12-16
Vo, Peter (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S830000, C029S831000, C029S852000, C257S797000, C361S802000
Reexamination Certificate
active
06662441
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to multi-layer circuit boards and method of forming multi-layer circuit boards. In particular, the present invention relates to methods for forming multi-layer circuit boards and detecting and compensating for misalignment of layers of the multi-layer circuit boards. Additionally, the present invention relates to multi-layer circuit boards formed according to the method.
BACKGROUND OF THE INVENTION
Typically, multi-layer circuit boards are formed from a plurality of layers of various materials. The materials may be electrically insulating or electrically conducting. Typically, the layers are formed and various materials are deposited on the surface of one or more layers and/or various materials are introduced into portions of the various layers. Additionally, various structures, such as holes, may be formed through one or more of the layers. Furthermore, circuitization may be formed on surface(s) of the layers. After forming the layers, the layers may then be assembled into a multi-layer structure.
Often, it is important that it is known where the layers are relative to each other in the multi-layer structure. Also, it may be important to know where structures in and/or on the layers are relative to structures in and/or on other layers in the multi-layer structure. For example, when forming structures such as holes, for example, plated through holes, in the multi-layer structure, it may be important to know where the various layers, and structures formed in and/or on the layers, are relative to each other to ensure that the through holes are located in the correct position and/or an optimal position for functioning of the circuit board.
In the past, alignment, or registration, of layers of multi-layer circuit boards has been achieved through a variety of means. For example, X-rays have been used to detect the placement of various features in and/or on layers of multi-layer circuit boards. Additionally, physical means have been utilized, such as drilling holes in each layer of a multi-layer circuit board and then stacking the circuit boards on a pin. Additionally, indentations have been formed in the sides of circuit board layers to align the layers. Such methods can be costly, inaccurate, and wasteful of materials.
BRIEF SUMMARY OF THE INVENTION
The present invention provides a system for ensuring alignment, or registration, of layers of a multi-layer circuit board without requiring the use of the above-discussed methods.
Accordingly, one advantage of the present invention is that it helps to ensure alignment, or registration, of layers of a multi-layer circuit board without the use of X-rays.
An object of the present invention is to provide a method for ensuring alignment of layers of a multi-layer circuit board.
In accordance with these and other objects and advantages, the present invention provides a method for detecting misalignment of layers of a multi-layer circuit board. A plurality of layers of electrically insulating material are formed. At least one artwork feature is formed on a surface of at least one of the layer of electrically insulating material in the vicinity of at least one edge of the at least one layer of electrically insulating material. At least one reference point is formed on the at least one layer of electrically insulating material. The layers of electrically insulating material are joined together. The at least one artwork feature on the at least one layer of electrically insulating material is/are exposed by removing a portion of the at least one layer of electrically insulating material. A location of the at least one artwork feature relative to the reference points is visually determined, thereby detecting misalignment of the layers of electrically insulating material.
Aspects of the present invention also include a method for forming a multi-layer circuit board. The method includes forming a plurality of layers of an electrically insulating material. At least one artwork feature on a surface of at least one layer of electrically insulating material in the vicinity of at least one edge of the at least one layer of electrically insulating material. The layers of electrically insulating material are joined together. The at least one artwork feature on the at least one layer of electrically insulating material is exposed. A reference point is provided on the at least one layer of electrically insulating material. A location of the at least one artwork feature relative to the reference points is visually determined, thereby detecting misalignment of the layers of electrically insulating material. An optimal location for forming at least one additional feature in or on the multi-layer circuit board is determined based upon the locations of the at least one artwork feature relative to the reference points. The at least one additional feature is formed in or on the multi-layer circuit board.
According to further aspects, the present invention provides a multi-layer circuit board. The circuit board includes a plurality of layers of an electrically insulating material. At least one artwork feature is located on a surface of at least one of the layers of electrically insulating material in the vicinity of at least one edge of each of the at least one layer of electrically insulating material. At least one reference point is located on the at least one layer of electrically insulating material. At least one additional feature is located in or on at least one layer of the multi-layer circuit board.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.
REFERENCES:
patent: 4510446 (1985-04-01), Braun et al.
patent: 5093183 (1992-03-01), Strunka
patent: 5111406 (1992-05-01), Zachman et al.
patent: 5195417 (1993-03-01), Hancock et al.
patent: 5214571 (1993-05-01), Dahlgren et al.
patent: 5214990 (1993-06-01), Ben-David et al.
patent: 5266380 (1993-11-01), Renguso et al.
patent: 5347462 (1994-09-01), Okuda et al.
patent: 5369491 (1994-11-01), Schneider
patent: 5377404 (1995-01-01), Berg
patent: 5429859 (1995-07-01), Young
patent: 5529441 (1996-06-01), Kosmowski et al.
patent: 5548372 (1996-08-01), Schroeder et al.
patent: 5768107 (1998-06-01), Ouchi et al.
patent: 6091026 (2000-07-01), Yang
patent: 6114634 (2000-09-01), Dittmer
“Automatic Method for Registration and Stacking of Laminates”,IBM Technical Disclosure Bulletin, vol. 33, No. 7, Dec. 1990, pp. 410-414.
International Business Machines - Corporation
Nguyen Donghai
Samodovitz Arthur J.
Vo Peter
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