Method for making integrated circuit with C-MOS logic, bipolar d

Metal treatment – Compositions – Heat treating

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29571, 29577C, 29578, 29580, 148174, 148175, 148187, 357 42, 357 43, 357 48, 357 51, 357 59, 357 91, H01L 21265, H01L 2120

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042565154

ABSTRACT:
An integrated circuit includes MOS transistors and bipolar transistors, each of both polarity types, in a silicon wafer. High value polysilicon resistors are formed over an outer protective silicon dioxide layer of the silicon wafer, which resistors are rendered conductive by having ion implanted impurities concentrated near the outer surface of the polysilicon body, permitting achievement of close tolerance resistors. The process for making the integrated circuit includes forming a sheet of polysilicon over the entire wafer surface, performing the ion implantation and etching away all but the desired resistor portions of the polysilicon. It also includes heating the wafer to simultaneously anneal the ion implanted polysilicon, form the gate oxide, thicken the oxide over the emitters, and cover the resistor body with a thin protective oxide film.

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patent: 3576478 (1971-04-01), Watkins et al.
patent: 3860836 (1975-01-01), Pedersen
patent: 4033797 (1977-07-01), Dill et al.
patent: 4055444 (1977-10-01), Rao
patent: 4110776 (1978-08-01), Rao et al.
patent: 4133000 (1979-01-01), Greenstein
King et al., "Polycrystalline Silicon Resistors for Integrated Circuits", Solid State Electronics , 1973, vol. 16, pp. 701-708.
Avery, L., "Recent Advances in LIC . . . Technology", Microelectronics and Reliability , vol. 15, 1976, pp. 75-83.

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