Method for making integrated circuit transistors with isolation

Details Method for making integrated circuit transistors with isolation Method for making integrated circuit transistors with isolation

1978-10-10

1979-09-25

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29576B, 29576E, 29576W, 29578, 148 15, 148190, 148191, 357 34, 357 40, 357 48, 29577C, H01L 2174, H01L 2176, H01L 21265

Patent

active

041689976

ABSTRACT:
In an integrated circuit structure a subsurface isolation layer is doped by diffusion during wafer processing. A substrate is first doped by ion implantation to create surface layer of the opposite conductivity type. Where substrate connections are to be created a heavier deposit of dopant is established using an impurity that will confer conductivity of the same polarity as the substrate. The wafer is then overgrown with an intrinsic layer that will be subsequently doped by diffusion of the ion implanted dopant. Then conventional integrated circuit processing is employed using buried conductive layers, epitaxy, isolation and device diffusion. The transistors thus produced can be designed to have isolation or substrate connected collectors as determined by the substrate surface doping.

REFERENCES:
patent: 3481801 (1969-12-01), Hugle
patent: 3560277 (1971-02-01), Lloyd et al.
patent: 3581165 (1971-05-01), Seelbach et al.
patent: 3656028 (1972-04-01), Langdon
patent: 3737347 (1973-06-01), Alcott et al.
patent: 3748545 (1973-07-01), Beale
patent: 3759760 (1973-09-01), Encinas
patent: 3767486 (1973-10-01), Imaizumi
patent: 3793088 (1974-02-01), Eckton
patent: 3912555 (1975-10-01), Tsuyuki
patent: 4046605 (1977-09-01), Nelson et al.

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