Method for making high-frame-rate CCD imaging devices from...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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C438S060000, C438S078000, C257S215000, C257S229000

Reexamination Certificate

active

06255134

ABSTRACT:

1. FIELD OF THE INVENTION
The present invention relates to electronic imaging devices, and more particularly to semiconductor processing methods for producing varieties of otherwise ordinary and inexpensive CCD array devices that can operate faster than one hundred frames-per-second.
2. DESCRIPTION OF THE PRIOR ART
The typical charge-coupled device (CCD) array is a solid-state imager that features ruggedness, extraordinary sensitivity, excellent image quality, low power demand, and never wears out. The CCD imager evolved from a low-cost integrated circuit (IC) memory element that was developed in 1970. CCD's can shift analog charges held in one photocell (called pixel) to an adjacent photocell by applying a suitable shift pulse. The analog information can be shifted from photocell to photocell with practically no loss or other distortion. It was discovered that the basic CCD memory could be modified to include light sensitive elements.
In the basic CCD array the individual imaging photocells are arranged in a rectangular matrix, e.g., the 512-line NTSC system requires around 491 active scan lines or rows, each with nearly 300 to 1000 elements or pixels typically. Each picture element converts incoming light into an electrical charge on an FET transistor that is directly proportional to the amount of light received. Such charge is then clocked, or shifted, from photocell to photocell out of the array to be converted to a video signal that represents the original image. In industrial applications such as machine vision or robot vision, the analog signals are typically converted to digital word for storage, process or transmission through computer systems. Monitors and displays that use analog video inputs are connected to digital-to-analog converters that reconstruct the original analog image signals.
The original frame transfer (FT) type CCD imaging devices required a mechanical shutter that would allow the analog charges to be shifted from photocell-to-photocell so the whole image could be clocked out into FIFO-registers. Otherwise, the light that was being received by each photocell would be converted to an analog electric signal that would be added to the one being clocked in from the upstream adjacent photocell. Such CCD devices were best suited for still camera work. The frame rates were basically limited by how fast all 491-lines could be clock out of the array before being spoiled by the next exposure.
A newer interline transfer (IT) type CCD solved the mechanical shutter problem. In the IT CCD, lines of storage cells are interdigitated amongst the active lines in the optical image area. Such lines of storage cells are only one clock pulse away from their individual corresponding active imaging lines, and each storage cell line is protected by a metal mask that keeps them permanently dark. So the active lines are simply clocked to their neighboring storage lines at the array's frame rate, e.g., during each vertical retrace period. The CCD array has until the next vertical retrace to clock out all 491 lines from the interdigitated storage cells.
Since the sensing and shifting functions are separated, each cell structure can be optimized for its particular use. However, some IT CCD imagers suffer from an artifact called vertical smear. Such occurs in pixels with extreme highlights because of the proximity of the sensing and storage elements. The light from extreme highlights actually leaks sideways into the adjacent storage register. The artifact appears as a vertical line that passes through the imaged highlight.
Every semiconductor technology used to fabricate a CCD imaging array will impose minimum exposure times on the active photocells and maximum clock rates on the storage cells. A typical CCD device, such as the Sony ICXO38DLA, Kodak KAI372, or Kodak KAI1001, has vertical registers that receive the image signals for each pixel on each line, and a horizontal register that receives each vertical register's output. The output of the horizontal register is a single line that carries the serial pixel-by-pixel frame representation. Therefore the frame rate is a function of the cell clocking rates, the frame's vertical depth, and the frame's horizontal width. For the Sony ICXO38DLA, that means 768-pixels on 484-lines.
A frame interline transfer (FIT) type CCD combines the best features of the older FT CCD imagers and the more recent IT CCD imagers. A top part of the FIT CCD operates like an IT CCD. But during the vertical interval, the image photocell charges are shifted from an interline storage register into a fully light-protected storage register below. So the charge packets are only held in an interline register for a very short time, and highlight contamination is substantially eliminated.
The prior art FIT structure offers the best overall performance available, but it is complex and needs larger chip real estates for the storage area. Such makes FIT CCD's significantly more expensive to manufacture.
Conventional commodity type CCD's are very inexpensive. They suit the NTSC types of applications where frame rates are relatively low, e.g., sixty frames-per-second. Special applications that require frame rates over one hundred frames-per-second have typically required special CCD integrated circuit designs and semiconductor technologies, and so involve low production numbers. The consequence has been very high manufacturing costs. There are many important CCD imaging applications that necessitate high frame rates, but the high cost of exotic parts cannot be justified.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a CCD imaging device that can operate at frame rates over one hundred frames-per-second.
It is another object of the present invention to provide a CCD imaging device that is inexpensive to manufacture.
Briefly, a CCD imaging device embodiment of the present invention comprises modifying the optical mask of an otherwise ordinary and inexpensive CCD integrated circuit to darken a majority of the active imaging photocells. The CCD integrated circuit is operated at near its maximum horizontal and vertical clock rates, but multiple image frames are defined within the one previous active photocell array field. The added dark areas in the optical mask protect the recent frames still in transit within the active array area from being double exposed and thus corrupted. The serial output of the thus-modified CCD device is reinterpreted to include more frames than originally at a multiple equal to the original array dimension divided by the new array dimension (m·n/m′·n′). So a modified CCD array that used only one-fourth of the original active area could be operated at four times the original frame rate.
An advantage of the present invention is that a CCD imaging device is provided that can operate at frame rates over one hundred frames-per-second and is inexpensive to manufacture.
Another advantage of the present invention is that a CCD imaging device with a very fast frame rate is obtainable by a simple mask change in one of the semiconductor fabrication process steps of an otherwise ordinary and commodity type CCD imaging device.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the drawing figure.


REFERENCES:
patent: 4364973 (1982-12-01), Koike et al.
patent: 5438414 (1995-08-01), Rust
patent: 5572251 (1996-11-01), Ogawa
patent: 5598017 (1997-01-01), Konuma

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