Semiconductor device manufacturing: process – Including control responsive to sensed condition – Electrical characteristic sensed
Reexamination Certificate
2001-05-31
2004-06-08
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
Electrical characteristic sensed
C438S421000, C257S466000
Reexamination Certificate
active
06746880
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method for making electrical contact with the rear side of a semiconductor substrate when processing the semiconductor substrate.
When manufacturing semiconductor components, process steps are used which require an electrical contact to the substrate to be processed. This is the case, for example, in electrical or electrochemical process steps. In order to be able to manufacture a large number of identical components in parallel on a semiconductor substrate, it is necessary for the substrate to be processed uniformly by the process step. This requires contacting methods which make electrical contact with the substrate in a way which is as homogenous as possible. If a homogenous electrical contact is not ensured, there is a variation in the electrical potential over the substrate, which can become manifest in an inhomogenous process control and can prevent a uniform execution of the process step. The fluctuation leads to a non-uniform galvanic deposition (in the case of a negative substrate potential) and to non-uniform anodic dissolving (in the case of a positive substrate potential).
In the case of the anodic dissolving of the substrate, given, for example, a suitably selected doping and electrolyte composition, pores are formed when there is a low anodic potential and electropolished surfaces are formed when there is a high anodic potential. This constitutes a considerable dependence of the semiconductor components to be formed on the potential applied and may prevent that properly functioning semiconductor components are formed.
The formation of pores in silicon is of interest, for example, for manufacturing trench capacitors because the formation of pores allows a considerable increase of the surface and thus allows to realize an associated increase in capacitance. Especially suitable pores are referred to as “mesopores” with a pore diameter in the range of 2-10 nanometers (nm). Since, as already mentioned above, the formation of pores depends on the electrical potential, it is of great importance to apply this potential as uniformly as possible over the substrate.
Published, Non-Prosecuted German Patent Application DE 197 28 962 A1 describes, for example, a device for etching a semiconductor wafer. The device is suitable, for example, for etching a main surface of the semiconductor wafer. Electrical contact is made with the semiconductor wafer from the rear side in its edge region.
Japanese Patent Document JP 59-41830 A relates to a mounting device for a semiconductor substrate, through the use of which a fluid for electroplating the semiconductor substrate is sprayed onto the semiconductor substrate. Here also, the electrical contact is made in the rear-side edge region.
U.S. Pat. No. 4,428,815 relates to a vacuum mounting device for mounting fragile objects such as, for example, semiconductor substrates. Electrical contact is made through the use of rear-side contact elements in the center of the substrate.
U.S. Pat. No. 5,437,777 relates to a system for depositing a wiring plane on a semiconductor wafer. Needle electrodes are installed on the front side of the substrate in order to make electrical contact with the front side of the substrate.
Japanese Patent Document JP 10-046394 A relates to an electroplating system and a method for a galvanic depositing, for example, of a metallic layer. Here, a mounting device for the semiconductor wafer is embodied in such a way that the contact is made with the semiconductor wafer at its periphery.
Japanese Patent Document JP 62-293632 A describes an insulating layer which is provided with holes and is provided between the semiconductor wafer and a chuck.
Japanese Patent Document JP 11-181600 A relates to a method for checking the electrical contact of connecting pins of an electroplating device. The connecting pins are connected to a conductive film which is provided on the wafer. In order to check the electrical contact of a connecting pin, the electrical resistance of this connecting pin is determined with respect to the other connecting pins.
A conventional method for making contact uniformly over the entire rear side is shown, for example, in U.S. Pat. No. 5,209,833. An electrolytic contact is made with the rear side of the substrate, which contact ensures a very low fluctuation of the contact resistance between the substrate and electrolyte.
The method for making electrolytic rear-side contact over the entire surface is, however, costly in terms of process technology because the electrolyte always requires a wet cell.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for electrically contacting a rear side of a semiconductor substrate which overcomes the above-mentioned disadvantages of the heretofore-known methods of this general type and which provides a uniform contact with the semiconductor substrate.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for electrically contacting a rear side of a semiconductor substrate when processing the semiconductor substrate, the method includes the steps of:
providing a semiconductor substrate having a substrate rear side and a substrate front side disposed opposite from the substrate rear side and, if appropriate, removing an insulating layer disposed on the substrate rear side; and
placing the semiconductor substrate with the substrate rear side on a substrate holder such that an electrically conductive contact layer formed of a semiconductor material is disposed between the semiconductor substrate and the substrate holder.
In other words, the object of the invention is achieved by a method for making electrical contact with the rear side of a semiconductor substrate during its processing, wherein a substrate is provided, which has a substrate rear side and a substrate front side located opposite the latter, with an insulating layer on the substrate rear side removed from it, and the substrate is provided with its substrate rear side on a substrate holder, and an electrically conductive layer made of a semiconductor material is provided between the substrate and the substrate holder.
The advantage of the method according to the invention is due to the fact that an electrolytic contact which would require a costly wet cell can be dispensed with. Instead, the electrical connection is made according to the invention through the use of an electrically conductive contact layer which can be used in combination with a substrate holder which is, for example, a metallic or metal-coated vacuum chuck. Here, for example, the conductive contact layer is firstly provided on the chuck and the substrate is subsequently provided on the conductive contact layer.
The electrical contact serves, for example, in electrical or electrochemical processes, to permit a uniform flow of current from the front side of the substrate to the substrate holder.
In one embodiment of the invention, the conductive contact layer is formed as a diffusion barrier for materials of which the substrate holder is composed. Without a diffusion barrier, a vacuum chuck provided with a gold layer could contaminate a semiconductor substrate composed of silicon, the gold atoms forming impurities or defects in the silicon substrate, as a result of which the functions of a field effect transistor can be disrupted.
A further embodiment of the invention provides for a conductive contact layer to be formed from a semiconductor material. The use of a semiconductor material, or preferably the use of the same semiconductor material as the substrate can suitably prevent the contamination of the substrate.
Furthermore, according to another mode of the invention, a conductive contact layer is doped with the same type of charge carrier or dopants as the substrate. Using the same type of charge carrier advantageously avoids a pn-type junction which has a diode blocking effect in a direction of current flow. By using the same type of charge carrier, a low-impedance electri
Birner Albert
Franosch Martin
Goldbach Matthias
Lehmann Volker
Lützen Jörn
Coleman W. David
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
LandOfFree
Method for making electrical contact with a rear side of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for making electrical contact with a rear side of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making electrical contact with a rear side of a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3296457