Fishing – trapping – and vermin destroying
Patent
1995-07-26
1996-07-16
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437193, 437919, H01L 218242
Patent
active
055366732
ABSTRACT:
A method is desired for making an array of dynamic random access memory (DRAM) cells having stacked capacitors with increased capacitance. The method involves forming a bottom electrode having a lower and upper fin-shaped portion in which a vertical extension is formed on the lower fin-shape portion at the same time that the upper fin is formed. This increases the capacitance of the stacked capacitor. The bottom electrode is formed by patterning a thick expendable silicon oxide layer and an underlying doped polysilicon layer (lower fin portion). Another polysilicon layer (upper fin portion is conformally coated over the thick insulating layer and patterned with an etch mask, which is smaller than the patterned insulating layer. An anisotropic etch is performed that forms the upper fin portion, the vertical extension on the lower fin portion and electrically isolates the array of electrodes. The capacitors are then completed by removing the expendable oxide layer, forming a capacitor dielectric layer on the bottom electrode, and patterning a doped polysilicon layer for the top electrode of the stacked capacitor.
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Hong Gary
Jenq Jason Jyh-shyang
Chaudhari Chandra
United Microelectronics Corporation
Wright William H.
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