Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Patent
1997-12-08
2000-05-16
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
438613, H01L 2144, H01L 2148, H01L 2150
Patent
active
060636475
ABSTRACT:
Methods for producing circuit elements the resultant circuit elements, and methods for making circuits therefrom are disclosed. A precursor circuit element includes a first insulating layer with conductor thereon and an electrically conducting member or bump, protruding from the conductor, that provide a shape to one surface of the precursor circuit element. A second insulating layer, including an adhesive, is placed onto the precursor circuit element and assumes the shape of the aforementioned surface of the precursor circuit element. A portion of the insulating layer is removed proximate the apex of the bump to expose at least a portion of the bump, for a sufficient electrical connection with a subsequent circuit element, while maintaining a sufficient amount of the insulating layer on the first initiating layer and bump to facilitate the mechanical connection (bond) between this resultant circuit element and a second circuit element, that may or may not have been produced by the method of the present invention.
REFERENCES:
patent: 3913223 (1975-10-01), Gigoux
patent: 4749120 (1988-06-01), Hatada
patent: 5282312 (1994-02-01), DiStefano et al.
patent: 5401913 (1995-03-01), Gerber et al.
patent: 5502884 (1996-04-01), Ladouceur
patent: 5808360 (1998-09-01), Akram
patent: 5897336 (1999-04-01), Brouillette et al.
Chen Yu
Gerber Joel A.
Schreiber Brian E.
Smith Joshua W.
3M Innovative Properties Company
Jones Josetta
McNutt Matthew B.
Niebling John F.
LandOfFree
Method for making circuit elements for a z-axis interconnect does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for making circuit elements for a z-axis interconnect, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making circuit elements for a z-axis interconnect will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-258218