Method for making capacitor for use in DRAM cell using triple la

Details Method for making capacitor for use in DRAM cell using triple la Method for making capacitor for use in DRAM cell using triple la

1994-04-26

1995-10-17

Thomas, Tom

Fishing, trapping, and vermin destroying

437 47, 437 60, 437228, 437229, 437919, H01L 218242

Patent

active

054590957

ABSTRACT:
A MOS capacitor structure in accordance with the invention is formed by depositing a polysilicon electrode layer on the substrate. Oxide regions are then formed on the polysilicon layer. Using the oxide regions as a mask, pillars are etched in the polysilicon electrode layer.

REFERENCES:
patent: 5134086 (1992-07-01), Ahm
patent: 5227322 (1993-07-01), Ko et al.

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