Etching a substrate: processes – Forming or treating electrical conductor article – Adhesive or autogenous bonding of self-sustaining preforms
Reexamination Certificate
2000-09-06
2002-05-21
Gulakowski, Randy (Department: 1746)
Etching a substrate: processes
Forming or treating electrical conductor article
Adhesive or autogenous bonding of self-sustaining preforms
C216S013000, C216S033000, C216S034000
Reexamination Certificate
active
06391211
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for making an electrical circuit board and more particularly, to a method for making a multi-layer electrical circuit board having multiple circuit interconnections and having apertures which are formed through the circuit board and/or through various portions of the circuit board.
BACKGROUND OF THE INVENTION
Multi-layer circuit boards contain and/or include electrical components which selectively and operatively populate opposed first and second surfaces (i.e., top and bottom surfaces) of each board (or other respective interior portions of each of the boards), thereby desirably allowing each of the electrical circuit boards to contain and/or include a relatively large number of electrical components which efficiently and densely populate the respective boards.
It is desirable to allow for communication by and between the component containing surfaces and/or portions of an electrical circuit board, thereby allowing the contained electrical components on each side of the board (or within certain interior portions of the board) to cooperatively and selectively interconnect to form one or more desired electrical circuits. This communication and interconnection may require the use of shared electrical ground planes, the transmittal of electrical power and/or control type signals between each of the component containing surfaces and/or the component containing board portions, and/or the selective and physical connection of various contained components.
This desired interconnection typically requires that one or more holes be drilled through each of the circuit boards, thereby creating at least one aperture or “via” lying and/or traversing between some or all of the opposed component containing surfaces, and through some or all of the various component containing interior circuit board portions. Such drilling is undesirable since it is relatively time consuming, costly, potentially causes damage to the formed electrical circuit boards requiring these circuit boards to be destroyed, and requires costly and inefficient electroless and/or electrolytic plating of the formed holes or “vias”. Additionally, these types of drilling processes often require portions of the circuit board to be precisely aligned during assembly. This precise alignment is often difficult to achieve and thus, circuit layers or portions are often misaligned, thereby adversely effecting the overall function of the multi-layer circuit board.
There is therefore a need to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks and which selectively allows “vias” to be desirably and selectively formed without the use of drilling and plating procedures and which further allows for the interconnection of one or more layers of electrical circuitry.
SUMMARY OF THE INVENTION
It is a first object of the present invention to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques.
It is a second object of the invention to provide a method for producing a multi-layer electrical circuit board which allows for the selective, efficient, and reliable formation of apertures and vias within the circuit board without the use of drilling and plating processes.
It is a third object of the present invention to provide a method for producing a multi-layer electrical circuit board which allows different layers of the circuit board to be automatically aligned during the circuit board formation process and which provides heatsinking and electrical interconnection pedestals to be integrally formed through the substrate.
According to a first aspect of the present invention a method for making a multi-layer electrical circuit board is provided. The method includes the steps of providing a first circuit portion having a first conductive surface; providing a second circuit portion having a second conductive surface; selectively applying first solder material to said first conductive surface; inserting said first circuit portion and said second circuit portion into a heated environment effective to cause said first solder material to be substantially liquefied; and moving said first circuit portion and said second circuit portion together in a manner which causes said first solder material to engage portions of said second conductive surface, thereby causing said first solder material to metallurgically bond to said portions of said first and second conductive surface, thereby automatically aligning said first circuit portion and said second circuit portion.
According to a second aspect of the present invention, a method for making a multi-layer circuit board is provided. The method includes the steps of: providing a first circuit layer having a first surface and a second surface; providing a second circuit layer having a third surface; selectively applying first solder material to the first surface; selectively applying first solder material to the second surface; heating the first circuit layer, effective to cause the first solder material to substantially liquefy; causing the first solder material to engage the third surface in a manner effective to cause the first solder material to metallurgically bond with the first and third surfaces, the bonding being effective to automatically align the first circuit layer with the second circuit layer in a desired manner; and selectively etching portions of the second surface of the first circuit layer, wherein at least a portion of the second solder material functions as an etchant mask and is effective to form at least one pedestal within the first circuit layer.
These and other objects, aspects, and advantages of the present invention will become apparent upon reading the following detailed description in combination with the accompanying drawings.
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Glovatsky Andrew Z.
Gordon Robert Joseph
Jairazbhoy Vivek Amir
Stoica Vladimir
Ahmed Shamim
Visteon Global Technologies Inc.
Visteon Global Technologies, Inc.
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