Method for making a stacked package semiconductor module...

Details Method for making a stacked package semiconductor module... Method for making a stacked package semiconductor module...

2011-03-29

2011-03-29

Purvis, Sue (Department: 2826)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S127000, C257SE23125, C257SE25027

Reexamination Certificate

active

07915084

ABSTRACT:
A stacked die chip scale package, in which a stacked die assembly is mounted within a cavity in a module substrate. In some embodiments certain of the die are stacked on a front side of a stacked die assembly substrate, and the stacked die assembly substrate is inverted in the cavity and the substrate is electrically interconnected to a front side of the module substrate; others of the die are stacked on the back side of the stacked die assembly substrate, and are interconnected by wire bonds to the front side of the module substrate. In some embodiments, the cavity is covered by a heat sink, and the stacked die assembly is mounted onto the heat sink. Also, methods for making the module are provided.

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