Method for making a self-aligned CMOS EPROM wherein the EPROM fl

Metal working – Method of mechanical manufacture – Assembling or joining

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29577C, 29576B, 29578, 148 15, H01L 2978, H01L 2902

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046464255

ABSTRACT:
A CMOS EPROM is made wherein the typical EPROM device is an N-channel IGFET having a control gate self-aligned with an underlying floating gate. In this process the EPROM floating gate and the gates of both the P-channel and N-channel peripheral circuit transistors are formed from a first deposited polysilicon layer. The EPROM control gate is formed from a second deposited polysilicon layer. This CMOS EPROM process employs a surprisingly few photoresist steps and is compatible with a high temperature oxidation step for making a very high quality intergate polysilicon oxide in the EPROM devices.

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Ghondi, VLSI Fabrication Principles, Silicon and Gallium Arsenide, John Wiley and Sons, New York, 1983, pp. 385-389.
"256Kb CMOS EPROM", by William Ip et al, ISSCC/Thursday, Feb. 23, 1984, pp. 138 and 139.
"Experimental Observation on Conduction Through Polysilicon Oxide", by H. R. Huff et al, pp. 2482 thru 2488, J. Electrohem. Soc.: Solid-State Science and Technology.

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