Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure
Reexamination Certificate
2005-12-27
2005-12-27
Thompson, Craig A. (Department: 2813)
Semiconductor device manufacturing: process
Making regenerative-type switching device
Having field effect structure
Reexamination Certificate
active
06979602
ABSTRACT:
A semiconductor device is formed including a substrate having an upper surface, a thyristor region in the substrate and a control port adapted for capacitively coupling to at least a portion of the thyristor region via a dielectric material. According to an example embodiment of the present invention, a trench is formed in the substrate and subsequently filled with materials including dielectric material and a control port. The control port is adapted for capacitively coupling to the thyristor via the dielectric material for controlling current flow in the thyristor (e.g., for causing an outflow of minority carriers from a portion of the thyristor for switching the thyristor from conducting state to a blocking state). A portion of the substrate adjacent to the upper surface is implanted with a species of ions, and the dielectric material via which the control port capacitively couples to the thyristor does not include the species of ions. In one implementation, a filled portion of the trench over the control port inhibits ions from implanting the dielectric material. In another implementation, the control port is formed recessed, relative to the upper surface of the substrate, such that the ion implant depth of the region adjacent to the upper surface is shallower than the recessed control port. With this approach, current control in the thyristor is effected using an arrangement that inhibits ion implantation damage to dielectric material used for controlling current in the thyristor.
REFERENCES:
patent: 6081002 (2000-06-01), Amerasekera et al.
patent: 6104045 (2000-08-01), Forbes et al.
patent: 6128216 (2000-10-01), Noble et al.
patent: 6225165 (2001-05-01), Noble et al.
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6492662 (2002-12-01), Hsu et al.
K. DeMeyer, S. Kubicek and H. van Meer, Raised Source/Drains with Disposable Spacers for sub 100 nm CMOS Technologies, Extended Abstracts of International Workshop on Junction Technology 2001.
Mark Rodder and D. Yeakley, Raised Source/Drain MOSFET with Dual Sidewall Spacers, IEEE Electron Device Letters, vol. 12, No. 3, Mar. 1991.
Yang-Kyu Choi, Daewon Ha, Tsu-Jae King and Chenming Hu, Nanoscale Ultrathin PMOSFETs with Raised Selective Germanium Source/Drain, IEEE Electron Device Letters, vol. 22, No. 9, Sep. 2001.
N. Lindert, Y. K., Choi, L. Chang, E. Anderson, W. C. Lee, T. J. King, J. Bokor, and C. Hu, Quasi-Planar FinFETs with Selectively Grown Germanium Raised Source/Drain, 2001 IEEE International SOI Conference, Oct. 2001.
T. Ohguro, H. Naruse, H. Sugaya, S. Nakamura, E. Morifuji, H. Kimijima, T. Yoshitomi, T. Morimoto, H.S. Momose, Y. Katsumata, and H. Iwai, High Performance RF Characteristics of Raised Gate/Source/Drain CMOS with Co Salicide, 1998 Symposium on VLSI Technology Digest of Technical Papers.
Hsiang-Jen Huang, Kun-Ming Chen, Tiao-Yuan Huang, Tien-Sheng Chao, Guo-Wei Huang, Chao-Hsin Chien, and Chun-Yen Chang, Improved Low Temperature Characteristics of P-Channel MOSFETs with Si1-xGex Raised Source and Drain, IEEE Transactions on Electron Devices, vol. 48, No. 8, Aug. 2001.
Plummer, James, D. and Scharf, Brad W., Insulated-Gate Planar Thyristors, I-Structure and Basic Operation, pp. 380-386.
Stanley Wolf Ph.D. and Richard N. Tauber Ph.D., Silicon Processing for the VLSI Era, vol. 1, 1986, p. 285-286.
Horch Andrew
Robins Scott
T-RAM, Inc.
Thompson Craig A.
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