Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-11-17
2004-06-01
Vinh, Lan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S712000, C438S720000, C216S002000
Reexamination Certificate
active
06743731
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of electronic circuits, and, more particularly, to methods for forming electronic circuits on dielectric layers.
BACKGROUND OF THE INVENTION
Radio frequency (RF) integrated circuits (ICs) and devices, such as inductors and capacitors, are well known for use in telecommunications applications. Many such devices and circuits are now being formed using thin dielectric layers or “membranes” made out of materials such as silicon nitride (SiN), for example. Such membranes have been found to improve the electrical characteristics of RF circuits mounted thereon. These membranes are typically formed on a substrate of suitable material, and the RF circuit is thereafter formed on the membrane which supports the RF circuit. The substrate provides support for the membrane during the patterning. Yet, capacitive coupling may occur between the substrate and the RF component, leading to device performance degradation.
To overcome this limitation, the RF component may be separated from the substrate. Prior art methods for removing the RF component from the substrate typically require etching a window through an opposite side of the substrate to release the membrane. This so-called “backside” etching may include using hot potassium hydroxide (KOH) to etch a silicon substrate, for example, where the dielectric layer acts as an etch stop layer. One difficulty with backside etching is that it requires careful double-sided alignment to make sure that the etched area corresponds with the membrane. Furthermore, due to the corrosiveness of the KOH, any exposed portions of the substrate must be protected from the etchant, e.g., by using a mask. Having to deposit and remove such a mask requires additional processing time and costs. Also, the etch rate of KOH is about 100 Am per hour. As a result, typical etch times for an eight inch wafer, for example, may be seven hours or greater.
A prior art technique which addresses some of the difficulties associated with backside etching is disclosed in U.S. Pat. No. 5,853,601 to Krishaswamy et al. entitled “Top-Via Etch Technique for Forming Dielectric Membranes.” The patent is directed to methods for forming film bulk acoustic resonators (FBAR). The structure of an FBAR includes a substrate having a cavity on a surface thereof, a membrane on the substrate extending over the surface cavity, a first electrode on the membrane, a piezoelectric layer on the first membrane, and a second electrode layer on the piezoelectric layer. The method disclosed in the patent includes forming vias or openings through the membrane layer and isotropically etching the substrate through the vias using a dry etch process including an SF
6
gas. While this method does address the difficulty of backside alignment, it does not teach how to release the RF component from the substrate. Furthermore, the etching process disclosed in the patent still requires a relatively long etch time due to the nature of the reactive ion etchant. Such an etchant may also damage delicate circuit components of RF circuits like those described above.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is therefore an object of the invention to provide a method for making a radio frequency (RF) component on a dielectric layer which alleviates the above noted problems associated with the prior art.
This and other objects, features, and advantages in accordance with the present invention are provided by a method for making an RF component including forming a dielectric layer on a semiconductor substrate and forming and patterning a conductive layer on the dielectric layer to define the RF component. The dielectric layer may include SiN, the conductive layer may include aluminum, and the semiconductor substrate may include silicon, for example. At least one opening may be formed through the RF component at least to the semiconductor substrate. Moreover, the at least one opening may either extend into the semiconductor substrate or substantially terminate at a surface of the semiconductor substrate. The RF component may then be released from the semiconductor substrate by exposing the semiconductor substrate to an etchant passing through the at least one opening to the semiconductor substrate.
Releasing the RF component may include exposing the semiconductor substrate to a dry etchant, such as XeF
2
, for example. The at least one opening may have a diameter in a range of about 0.5 to 20 &mgr;m. Also, forming the at least one opening may include forming a plurality of openings laterally adjacent to portions of the conductive layer with no openings extending through the conductive layer. The plurality of openings may be formed in a predetermined pattern having substantially uniform spacing between adjacent openings, where the substantially uniform spacing is in a range of about 20 to about 200 &mgr;m, for example.
An RF component according to the invention is also provided. The RF component may include a dielectric layer having opposing first and second major surfaces, the first surface being free from a semiconductor substrate, the dielectric layer having a plurality of openings extending between the first and second opposing major surfaces. The RF component may also include a patterned conductive layer on the second major surface of the dielectric layer.
REFERENCES:
patent: 4502932 (1985-03-01), Kline et al.
patent: 4556812 (1985-12-01), Kline et al.
patent: 4719383 (1988-01-01), Wang et al.
patent: 4890370 (1990-01-01), Fukuda et al.
patent: 4988957 (1991-01-01), Thompson et al.
patent: 5067004 (1991-11-01), Marshall et al.
patent: 5075641 (1991-12-01), Weber et al.
patent: 5166646 (1992-11-01), Avanic et al.
patent: 5185589 (1993-02-01), Krishnaswamy et al.
patent: 5231327 (1993-07-01), Ketcham
patent: 5232571 (1993-08-01), Braymen
patent: 5233259 (1993-08-01), Krishnaswamy et al.
patent: 5283458 (1994-02-01), Stokes et al.
patent: 5291159 (1994-03-01), Vale
patent: 5294898 (1994-03-01), Dworsky et al.
patent: 5303457 (1994-04-01), Falkner, Jr. et al.
patent: 5334960 (1994-08-01), Penunuri
patent: 5348617 (1994-09-01), Braymen
patent: 5367308 (1994-11-01), Weber
patent: 5373268 (1994-12-01), Dworsky et al.
patent: 5381385 (1995-01-01), Greenstein
patent: 5403701 (1995-04-01), Lum et al.
patent: 5404628 (1995-04-01), Ketcham
patent: 5424698 (1995-06-01), Dydyk et al.
patent: 5438554 (1995-08-01), Seyed-Bolorforosh et al.
patent: 5446306 (1995-08-01), Stokes et al.
patent: 5552655 (1996-09-01), Stokes et al.
patent: 5587620 (1996-12-01), Ruby et al.
patent: 5596239 (1997-01-01), Dydyk
patent: 5617065 (1997-04-01), Dydyk
patent: 5630949 (1997-05-01), Lakin
patent: 5646583 (1997-07-01), Seabury et al.
patent: 5692279 (1997-12-01), Mang et al.
patent: 5698928 (1997-12-01), Mang et al.
patent: 5702775 (1997-12-01), Anderson et al.
patent: 5714917 (1998-02-01), Ella
patent: 5760663 (1998-06-01), Pradal
patent: 5780713 (1998-07-01), Ruby
patent: 5789845 (1998-08-01), Wadaka et al.
patent: 5821833 (1998-10-01), Lakin
patent: 5853601 (1998-12-01), Krishaswamy et al.
patent: 5864261 (1999-01-01), Weber
patent: 5872493 (1999-02-01), Ella
patent: 5873153 (1999-02-01), Ruby et al.
patent: 5873154 (1999-02-01), Ylilammi et al.
patent: 5883575 (1999-03-01), Ruby et al.
patent: 5884378 (1999-03-01), Dydyk
patent: 5894647 (1999-04-01), Lakin
patent: 5910756 (1999-06-01), Ella
patent: 5928598 (1999-07-01), Anderson et al.
patent: 5942958 (1999-08-01), Lakin
patent: 5963856 (1999-10-01), Kim
patent: 5998816 (1999-12-01), Nataki et al.
patent: 6051907 (2000-04-01), Ylilammi
patent: 6060818 (2000-05-01), Ruby et al.
patent: 6081171 (2000-06-01), Ella
patent: 6087198 (2000-07-01), Panasik
patent: 6093330 (2000-07-01), Chong et al.
patent: 6127768 (2000-10-01), Stoner et al.
patent: 6131256 (2000-10-01), Dydyk et al.
patent: 6150703 (2000-11-01), Cushman et al.
patent: 6198208 (2001-03-01), Yano et al.
patent: 6204737 (2001-03-01), Ella
patent: 6215375 (2001-04-01), Larson, III et al.
patent: 6355498 (2002-03-01), Chan et al.
Ziaie et al., “A generic micr
Agere Systems Inc.
Vinh Lan
LandOfFree
Method for making a radio frequency component and component... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for making a radio frequency component and component..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making a radio frequency component and component... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3355141