Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1995-06-30
2002-04-30
Vo, Peter (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S830000, C029S846000, C174S265000, C216S018000, C427S097100
Reexamination Certificate
active
06378201
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention pertains to multilayer printed circuit boards and to corresponding fabrication methods.
2. Description of the Related Art
In prior multilayer printed circuit boards, it is common to dispose power supply and ground layers inside and signal layers outside, and to interconnect those layers by through holes. Inasmuch as the through holes are formed by mechanical drilling and hence tend to be of relatively large size, it is difficult to increase the wiring density of the circuit board. Also, inasmuch as it is necessary to design the signal layers on both sides while always taking through hole connections into consideration, freedom in wiring design is relatively restricted. Moreover, because the through holes pass through the power supply and ground layers, it is necessary to provide clearance holes at those through hole locations in the power supply and ground layers where no power supply or ground connections are required. Accordingly, the higher the through hole density becomes, the smaller the clearance holes have to be formed with still higher accuracy, which in turn entails more accurate alignment of the signal layers with the power supply and ground layers in laminating those layers. Recently, in addition to PIH (Pin In Hole) components which are mounted by inserting their pins into through holes, SMT (Surface Mount Technology) components which are mounted without pins have come to be used. Therefore, there is a need for multilayer printed circuit boards which can be applied to both SMT and PIH components, and which can provide higher wiring density and higher degree of freedom in design of wiring.
OBJECTS OF THE INVENTION
The primary objects of the invention are to provide a multilayer printed circuit board, and a corresponding fabrication method, which achieves a significantly higher wiring density and a significantly higher degree of wiring design freedom than was previously possible, and in which through hole connections are reduced. Other objects of the invention are to provide a multilayer printed circuit board useful for achieving SMT component mounting and PIH component mounting.
SUMMARY OF THE INVENTION
The above objects are achieved, in accordance with the invention, by providing a multilayer printed circuit board in which power conductors or ground conductors are electrically connected using through holes. On the other hand, signal conductors in any two adjacent signal wiring layers are electrically connected using via holes extending only through an intervening electrically insulating layer. Preferably, the electrically insulating layer is a layer of photosensitive resin and the via holes are formed using conventional photolithographic techniques.
In a first embodiment of the inventive multilayer printed circuit board, a region of electrically conductive material, e.g., copper, overlies, i.e., lies on or over, a surface of an electrically insulating substrate. This region of electrically conductive material is, for example, a layer of electrically conductive material, lying on the electrically insulating substrate, which serves as a power supply layer or ground layer. Two or more signal wiring layers, separated by an electrically insulating layer, overlie the opposite surface of the electrically insulating substrate. The outermost signal wiring layer includes an electrical conductor which serves as a power conductor or ground conductor. A through hole, containing electrically conductive material, serves to electrically connect the power conductor or ground conductor to the power supply layer or ground layer. In addition, one or more via holes, extending only through the electrically insulating layer and containing electrically conductive material, serve to electrically connect two or more signal conductors in the adjacent signal wiring layers.
In a second embodiment of the inventive multilayer printed circuit board, two or more signal wiring layers, separated by electrically insulating layers, overlie each surface of the electrically insulating substrate. The outermost signal wiring layers include power or ground conductors which are electrically connected by a through hole containing electrically conductive material. As before, signal conductors in adjacent signal wiring layers are electrically connected by via holes extending through the intervening electrically insulating layers and containing electrically conductive material.
It should be noted that SMT components are readily mounted on (appropriately dimensioned and configured) signal conductors, which serve as mounting terminals, in the outermost wiring layers of the first and second embodiments. In addition, PIH components are readily mounted in the through holes employed in the two embodiments.
REFERENCES:
patent: 4642160 (1987-02-01), Burgess
patent: 4673773 (1987-06-01), Nakano et al.
patent: 4710854 (1987-12-01), Yamada et al.
patent: 4806188 (1989-02-01), Rellick
patent: 4830691 (1989-05-01), Kida et al.
patent: 4882454 (1989-11-01), Peterson et al.
patent: 4902610 (1990-02-01), Shipley
patent: 4904968 (1990-02-01), Theus
patent: 5010641 (1991-04-01), Sisler
patent: 36 05 474 (1987-08-01), None
patent: 38 40 207 (1990-05-01), None
patent: 0 478 313 (1986-08-01), None
patent: 1330 100 (1973-09-01), None
Tsuchida Shuhei
Tsukada Yutaka
Chang Rick Kiltae
Samodovitz Arthur J.
Vo Peter
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