Semiconductor device manufacturing: process – Gettering of substrate
Reexamination Certificate
2000-06-16
2002-01-22
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Gettering of substrate
C438S618000, C438S701000, C438S678000, C438S486000, C438S637000
Reexamination Certificate
active
06340626
ABSTRACT:
TECHNICAL FIELD
The present invention relates, in general, to making metallic patterns such as electrical printed circuits, integrated circuits and the like and, in particular, to a process that significantly reduces the occurrence of metal defects in the desired metallic patterns by twice exposing and twice developing away the photoresist layers used in defining the desired metallic patterns.
BACKGROUND OF THE INVENTION
In the manufacture of electrical printed circuits, integrated circuits and the like, defects in the metal layer occur quite frequently as the electrical circuits are being fabricated. Depending on the form of the metallic pattern and the method by which the metallic pattern is being fabricated, the defect can be an opening (e.g., an “open” or “void” in an electrical circuit) where no opening should exist or the presence of metal (e.g., a “bridge” in an electrical circuit) at a location where metal should not be present.
Many solutions for overcoming such metal defects, such as repairing that portion of the unit that has the defect, have been proposed in the past. Some of these solutions are very costly, while others are inadequate. In certain applications, the metal defects in the metal layer simply cannot be repaired. This leads to a significant scrap rate. In many instances, metal defects are difficult to detect. This poses a significant reliability risk.
SUMMARY OF THE INVENTION
It is an objective of the present invention to provide a new and improved method for making metallic patterns.
It is another objective of the present invention to provide a method of making electrical circuits, such as printed circuits, integrated circuits and the like, by which the occurrence of metal defects is greatly reduced.
It is yet another objective of the present invention to provide a method of making electrical circuits, such as printed circuits, integrated circuits and the like, by which the reduction in metal defects is achieved in a relatively simple manner and at a relatively low cost.
Accordingly, a method for making a metallic pattern, in accordance with the present invention, includes providing a substrate having a metal layer on a surface of the substrate and applying a photoresist layer onto the metal layer to cover the metal layer. Then, a desired pattern is patterned in the metal layer a first time and, after moving contaminants in the photoresist layer that have created defects in the pattern in the metal layer, the desired pattern is patterned in the metal layer a second time.
REFERENCES:
patent: 6166334 (2000-12-01), Galloway
patent: 6212769 (2001-04-01), Boyko et al.
Desai Kamalesh S.
Husson Brian D.
Jeanneret Mathias P.
Tirch, III Stephen J.
Anya Igwe U.
Ratner & Prestia
Smith Matthew
Townsend, Esq. Tiffany L.
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