Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1995-06-09
1998-10-20
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438254, 148DIG14, H01L 2120
Patent
active
058245936
ABSTRACT:
Semiconductor memory device and method for fabricating the same for increasing the capacity of a capacitor by minimizing the capacitor area lost for a storage contact. The method includes steps of forming a transistor on a semiconductor substrate, forming a first insulation film over the entire surface of the substrate having the transistor formed thereon, forming a contact region exposing a designated part of the substrate by subjecting the first insulation film to a selective etching for forming a storage node contact, forming a first conductive layer, a second insulation film, and a second conductive layer successively over the entire surface of the substrate, forming a first mask pattern on the second conductive layer within the contact region spaces for a certain distance from the first insulation film pattern at least in one direction, subjecting the second conductive layer to an etching with the first mask pattern as a mask, forming a second mask pattern for forming a storage node contact on the second insulation film and the second conductive layer, subjecting the second insulation film with the second mask pattern as a mask, and forming a third conductive layer over the entire surface of the substrate so as to connect the first conductive layer and the second conductive layer.
REFERENCES:
patent: 5071781 (1991-12-01), Seo et al.
patent: 5268322 (1993-12-01), Lee et al.
patent: 5416037 (1995-05-01), Sato et al.
patent: 5449635 (1995-09-01), Jun
patent: 5571742 (1996-11-01), Jeong
T. Ema et al "3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMs" 592-IEDM 88.
LG Semicon Co. Ltd.
Nguyen Tuan H.
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