Fishing – trapping – and vermin destroying
Patent
1995-09-07
1996-08-27
Fourson, George
Fishing, trapping, and vermin destroying
437192, 437193, 437245, H01L 2144
Patent
active
055500854
ABSTRACT:
A method of forming damage-free buried contacts in a semiconductor substrate without the trenches and pitted areas can be carried out by forming a silicon oxide layer as a gate dielectric layer on top of the substrate, forming a first polysilicon layer on top of the silicon oxide layer, anisotropically etching away the first polysilicon layer by using a first mask and a first etching gas that has high etching selectivity between polysilicon and silicon oxide such that a first portion of the polysilicon layer is left on the top surface of the substrate except the area defining a buried contact, forming in the substrate a zone of a second conductivity type at the area defining the buried contact by implanting impurity ions, removing the silicon oxide layer over the area defining the buried contact and removing the masking layer over the first portion of the polysilicon layer, depositing sequentially a conducting layer and a second polysilicon layer, anisotropically etching the second polysilicon layer over an area defining a transistor gate electrode and interconnect by using a second mask and a second etching gas that has high etching selectivity between polysilicon and the conducting layer, anisotropically etching the conducting layer over the area defining the transistor gate electrode and interconnect by a third etching gas that has high etching selectivity between the conducting layer, the polysilicon layer and the silicon layer, and optionally removing the residual polysilicon in the transistor gate electrode and interconnect by heating to a temperature of not less than 800.degree. C. in an O.sub.2 or H.sub.2 O ambient.
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Everhart C.
Fourson George
Winbond Electronics Corp.
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