Method for making a build-up package of a semiconductor

Details Method for making a build-up package of a semiconductor Method for making a build-up package of a semiconductor

2002-02-15

2004-03-09

Chang, Richard (Department: 3729)

Metal working

Method of mechanical manufacture

Electrical device making

C029S830000, C029S832000, C029S846000, C257S678000, C438S100000, C438S108000, C438S127000, C174S524000

Reexamination Certificate

active

06701614

ABSTRACT:

FIELD OF THE INVENTION
The present invention is relating to a semiconductor die packaging method and structure, more particularly to a method for making a semiconductor die package using build up technology and a structure formed from the same.
BACKGROUND OF THE INVENTION
In conventional semiconductor packaging technology firstly a plurality of dies are adhered on a substrate, such as printed circuit board or lead frame being a die carrier for packaging the dies with an encapsulating material after electrically connecting by wire-bonding or TAB (Tape Automated Bonding) method. However with small-size and high-density trend of semiconductor dies, a flip-chip (face-down) mounting technology is brought up. At first a plurality of conductive solder bumps are formed on active surface of a die, then the die is mechanically and electrically bonded to a substrate, finally it is encapsulated. Due to the difference of two thermal expansion coefficients between the semiconductor die and substrate of plastic (or metal) material, the bumps between die and substrate suffer more stress. That is easy to happen fail of electrical connection between semiconductor die and substrate. Although an underfilling method is brought up for solving the problem of electrical disconnection, but it is unable to become a basic manufacturing process of flip chip because of underfilling time and production yield.
A packaging method is brought up in U.S. Pat. No. 6,271,469. A semiconductor die is encapsulated before electrical connection in advance. Electrical connection traces are formed on dielectric layers by means of build-up technology of manufacturing multi-layer printed circuit board. The common method accords with advanced semiconductor die package for packaging high-density and small-size dies. As shown in
FIG. 1
, the manufacturing method is adhering the active surface
106
of a die
102
having conductive pads
108
to a protective film
104
and then executing molding process to form an encapsulating material
112
that covers the back surface
114
and sides
116
of die
102
, then the protective film
104
is removed away. The encapsulating material
112
has a surface coplanar to the active surface
106
of die
102
. Furthermore as shown in
FIG. 2
, two dielectric layers
118
and
126
are formed by build-up method. The first dielectric layer
118
, such as silicon nitride or silicon dioxide material, is formed on the surface of the encapsulating material
112
and the active surface
106
of die
102
by spin coating or vapor deposition. Besides, a plurality of vias are formed on the first dielectric layer
118
by laser drilling or photolithography method. A metal layer is formed on the first dielectric layer
118
. A plurality of conductive traces
124
are etched by photolithography method from the metal layer. Similarly, the second dielectric layer
126
, vias and metal layer are formed in turn, a plurality of conductive plugs
132
and conductive pads
134
are formed by etching the metal layer. Then, a solder resist
136
is formed by printing, and etched to form a plurality of openings. Conductive solder bumps
138
are formed on the openings of the solder resist
136
to become outer electrical connecting terminals of the semiconductor build-up package. In the manufacturing process, the dielectric layers and metal layer in the semiconductor build-up package are formed in turn and the vias are opened on each of the dielectric layers. Besides, the diameter of vias formed on the first dielectric layer
118
and the interval between two adjacent vias are severely required to be pretty tiny for corresponding to the bonding pads
108
of die
102
. It is rather difficult to manufacture the conductive traces
124
that connect the bonding pads
108
of die
102
through the vias. Also the thickness of the conductive traces
124
deposited in the vias is not easy to keep even. A fail of electrical connection may happens.
SUMMARY
The first object of the present invention is to provide a method for making a build-up package of a semiconductor die. A copper foil with conductive columns and a dielectric film are thermally compressed with an encapsulating material having a die. Then, the dielectric film is cured to form a dielectric layer with electrical connection. Therefore, the common step of forming the vias on the dielectric layer can be eliminated for making a build-up package rapidly.
The second object of the present invention is to provide a method for making a build-up package on a semiconductor die. A copper foil with conductive columns and a dielectric film are thermally compressed with an encapsulating material having a die. Then, the dielectric film is cured to form a dielectric layer with electrical connection. After repeating thermal compression, multi-dielectric layers with vertically corresponding “column-on-column” configuration may be made for shortening wire-disposing space and enhancing electrically connecting efficiency.
The third object of the present invention is to provide a build-up package of a semiconductor die. Conductive columns extending through a first dielectric layer are bonded on the bonding pads of die for ensuring excellent electrical connection.
The fourth object of the present invention is to provide a build-up package of a semiconductor die. Each dielectric layer with a plurality of vertically conductive columns is formed on the encapsulating material by build-up stacking. Some conductive columns vertically correspond on the conductive columns of adjacent dielectric layer for completing electrical connections with fewer dielectric layers and shorter conductive path.
According to the present invention, a method for making a build-up package of a semiconductor die is firstly to form an encapsulating material to carry dies. Then, a copper foil with conductive columns is bonded onto the encapsulating material by thermal compression, and a pre-curing dielectric film is interposed between the copper foil and the encapsulating material. The dielectric film is cured to form a dielectric layer of a build-up die package. It is better that the steps of thermal compression and curing are executed simultaneously. Thereafter, the etching process can be performed on the dielectric layer so that the copper foil becomes conductive pads and conductive traces electrically connecting the conductive columns. Besides, the conductive pads of the most outside dielectric film are bonded with solder balls or pins. The conductive columns could be any kind of conductive materials, such as solder materials by printing or electroplating on the copper foil or the metal columns (like copper columns) bonded on the copper foil by solder paste or ACF (anisotropic conductive film).
According to the present invention, a build-up package of a semiconductor die comprises a die, an encapsulating material for carrying the die and at least a dielectric layer. The encapsulating material has a surface to expose the bonding pads of the die. The dielectric film is formed on the surface of the encapsulating material and has a plurality of conductive columns through the dielectric film to electrically connect with the bonding pads of the die. It is better that the build-up die package further includes a plurality of dielectric layers stacking on the surface of the encapsulating material. Some conductive columns are vertically corresponding to the conductive columns of adjacent dielectric layer. A circuit layer is formed between the two adjacent dielectric layers.


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