Semiconductor device manufacturing: process – Semiconductor substrate dicing
Reexamination Certificate
2001-03-27
2003-04-29
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Reexamination Certificate
active
06555447
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to dicing of semiconductor wafers. More specifically, the present invention relates to a method for laser scribing semiconductor wafers prior to mechanical dicing of the semiconductor wafer.
BACKGROUND OF THE INVENTION
Die separation, or dicing, by sawing is the process of cutting a microelectronic substrate into its individual circuit die with a rotating circular abrasive saw blade. This process has proven to be the most efficient and economical method in use today. It provides versatility in selection of depth and width (kerf) of cut, as well as selection of surface finish, and can be used to saw either partially or completely through a wafer or substrate.
Wafer dicing technology has progressed rapidly, and dicing is now a mandatory procedure in most front-end semiconductor packaging operations. It is used extensively for separation of die on silicon integrated circuit wafers.
Increasing use of microelectronic technology in microwave and hybrid circuits, memories, computers, defense and medical electronics has created an array of new and difficult problems for the industry. More expensive and exotic materials, such as sapphire, garnet, alumina, ceramic, glass, quartz, ferrite, and other hard, brittle substrates, are being used. They are often combined to produce multiple layers of dissimilar materials, thus adding further to the dicing problems. The high cost of these substrates, together with the value of the circuits fabricated on them, makes it difficult to accept anything less than high yield at the die-separation phase.
Dicing is the mechanical process of machining with abrasive particles. It is assumed that this process mechanism is similar to creep grinding. As such, a similarity may be found in material removal behavior between dicing and grinding. The size of the dicing blades used for die separation, however, makes the process unique. Typically, the blade thickness ranges from 0.6 mils to 50 mils (0.015 mm to 1.27 mm), and diamond particles (the hardest known material) are used as the abrasive material ingredient. Dicing saw blades are made in the form of an annular disc that is either clamped between the flanges of a hub or built on a hub that accurately positions the thin flexible saw blade. Because of the diamond dicing blade's extreme fineness, compliance with a strict set of parameters is imperative, and even the slightest deviation from the norm could result in complete failure.
FIG. 1
is an isometric view of a semiconductor wafer
100
during the fabrication of semiconductor devices. A conventional semiconductor wafer
100
may have a plurality of chips, or dies,
100
a,
100
b
, . . . formed on its top surface. In order to separate the chips
100
a
,
100
b
, . . . from one another and the wafer
100
, a series of orthogonal lines or “streets”
102
,
104
are cut into the wafer
100
. This process is also known as dicing the wafer.
IC wafers are coated with various layers such as passivation of oxides or nitrides, dielectrics, polymer coatings, and aluminum as well as copper metal pads (all collectively shown as
106
in FIG.
1
). The wafer scribe lines (streets) reflect similar coatings on the chips, since all of the test devices and alignment marks are located within the scribe line borders. The wafer streets are therefore fully or partially coated with different materials and are largely non-homogeneous. This combination of materials has a significant effect on wafer dicing and die edge quality. As shown in
FIG. 4
, when conventional dicing technology is used, such as a single blade and a single cut, the die edge on the bottom side of semiconductor wafer
400
suffers severe backside chipping (BSC)
406
. In addition, on the topside of the wafer
400
, problems at the die edge include cracking of the passivation and dielectric layers (not shown), the smearing or tearing of the metal pads (not shown), and the formation of polymer slivers (not shown).
One approach to overcome the aforementioned die edge problems is a mechanical dual dicing method. This method is a combination of two cuts (step cut), the first one being shallow and the second one being a through cut. The purpose of the first cut is to remove all the coatings
106
from the streets
102
,
104
of semiconductor wafer
100
in order to permit a smooth through cut. The first cut, is performed using either a beveled blade or a standard blade that penetrates the silicon wafer as well. The removal of the coatings, passivation, dielectrics and metal pads
106
from the streets
102
,
104
also affects the backside chipping. As a result, the size of chipping is reduced.
There are many disadvantages, however, to the step cut. First, the process throughput is reduced dramatically, since instead of one pass in the street, two passes are required. Second, the mechanical removal of the coatings creates residual cracks, which, in turn, cause further deterioration of the dice. Third, when the bevel blade wears out, the kerf gets wider and this requires frequent handling and replacement of the blade. Forth, the price of bevel blades is more expensive by a factor of five compared to a standard blade. All these drawbacks result in a high cost of ownership with regard to the step cut process.
There are other disadvantages regarding the beveled cut. Namely, blade penetration height must be carefully monitored, because for each one micron of penetration, the kerf widens by about two microns. In addition, the beveled blade may insert hidden damage into the die edge, in the form of cracks for example. Visual inspection of dice after dicing (an industry standard) is not capable of detecting this damage.
In view of the shortcomings of the prior art, there is a need to develop a method to cut die having various coating layers and test structures in the wafer scribe lane so as to increase throughput, minimize the backside chipping, and to increase the yield of useable circuits.
SUMMARY OF THE INVENTION
In view of the shortcomings of the prior art, it is an object of the present invention to optimize the dicing process and minimize bottom side chipping (BSC) of semiconductor wafers.
The present invention is a method for dicing a semiconductor substrate by focusing a laser beam on a top surface of the substrate; absorbing energy into only the layer; and forming scribe lines on the substrate by scanning the laser beam across the surface of the substrate to evaporate only portions of the layer.
According to another aspect of the invention, the substrate is diced with a dicing saw after the substrate is scribed.
According to still another aspect of the invention, the scribe line removes all the layers over the silicon wafer, with minimal heat damage to the silicon substrate.
These and other aspects of the invention are set forth below with reference to the drawings and the description of exemplary embodiments of the invention.
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Manor Ran
Weishauss Ilan
Wertheim Oded
Kulicke & Soffa Investments Inc.
Le Thao P
RatnerPrestia
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