Method for isolating the components of an integrated circuit

Adhesive bonding and miscellaneous chemical manufacture – Methods

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156 17, 427 85, 427 93, H01L 750

Patent

active

039909271

ABSTRACT:
The method of isolating integrated circuit components on a conductive silicon wafer having a deep layer isolated from a surface layer consists in forming a first deposit of low density on each surface zone in which an integrated circuit component is to be implanted while leaving an uncoated strip which separates each deposit from adjacent deposits, in forming a channel corresponding to each strip within the surface layer and partly within the deep layer, in performing selective deposition of silica on the entire wafer so as to fill the channels up to the bottom of the first deposits, and in removing the first deposits so as to leave insulating silica walls around the surface zones.

REFERENCES:
patent: 3144366 (1964-08-01), Rideout et al.
patent: 3425879 (1969-02-01), Shaw et al.
patent: 3519504 (1970-07-01), Cuomo
patent: 3640782 (1972-02-01), Brown et al.
patent: 3675314 (1972-07-01), Levi
IBM Tech. Discl. Bull., V. Y. Doo, "Selective Etch of Silicon Nitride Films", vol. 13, No. 9, Feb. 1971, p. 2468.
IBM Tech. Discl. Bull., V. Y. Doo, "High Capacitance PN Junction Capacitors By Etch-Refill Method", vol. 9, No. 7, Dec. 1966, p. 920.

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