Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive...
Reexamination Certificate
1998-12-23
2001-08-14
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
C438S424000, C438S430000, C438S431000, C438S427000
Reexamination Certificate
active
06274455
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for isolating a semiconductor device, and in particular to an improved method for isolating a semiconductor device which is well applicable to a shallow trench isolation for filling an insulation layer into a shallow trench.
2. Description of the Background Art
FIGS. 1A through 1F
are views illustrating a known semiconductor device isolation method. As shown in
FIG. 1A
, an oxide film, which is a first insulation film
2
, is formed on a semiconductor substrate
1
to a thickness of 500~100 Å, and a nitride film, which is a second insulation film
3
, is formed on the first insulation film
2
to a thickness of 2000 Å. In addition, a photoresist film
4
is formed on the second insulation film
3
.
As shown in
FIG. 1B
, the photoresist film
4
is patterned through a conventional exposing and developing processes for exposing the surface of the second insulation film
3
, and then the first insulation film
2
and the second insulation film
3
are sequentially etched using the resultant structure as a mask.
As shown in
FIG. 1C
, the substrate
1
is etched using the first insulation film
2
and the second insulation film
3
as a mask for thereby forming a trench
5
. A shallow third insulation film
6
, which is an oxide film, is formed in the trench
5
based on the thermal oxidation process. Thereafter, a fourth insulation film
7
is formed on the second insulation film
3
. As a result, the trench
5
is filled by the fourth insulation film
7
.
Here, the fourth insulation film
7
is formed as an oxide film based on a high density plasma chemical vapor deposition method, and then a heat treatment is performed for forming a good quality device isolation film for thereby densifying the fourth insulation film
7
.
As shown in
FIG. 1D
, the fourth insulation film
7
is etched by a chemical-mechanical polishing (CMP) method until the surface of the second insulation film
3
is exposed. At this time, the second insulation film
3
acts as an etching stop film.
As shown in
FIG. 1E
, the first insulation film
2
and the second insulation film
3
are removed from the substrate
1
for thereby completing a known semiconductor device isolation process. The second insulation film
3
is removed based on a wet etching method in which H
3
PO
4
solution is used.
The known semiconductor device isolation method has the following problems.
First, the polishing process for forming an oxide film for filling the trench and etching the oxide film is implemented by an expensive semiconductor apparatus. In addition, a large amount of slurry which is a polishing material used during the CMP process is used for thereby increasing the fabrication cost.
Second, the surface of the semiconductor substrate may be damaged due to the stress of a thick silicon nitride film during the high temperature heat treatment after the HDP CVD oxide film, which is the fourth insulation film, is deposited.
Third, when chemically and mechanically polishing the HDP CVD oxide film, which is the fourth insulation film, it is difficult to control the uniformity of the surface of the oxide film.
Fourth, when etching the fourth insulation film using the CMP process, the third and fourth insulation films at the corner portions of the trench are etched to a predetermined thickness lower than the surface of the semiconductor substrate (refer to a dotted line in FIG.
1
E). Therefore, when depositing and etching the polysilicon for forming a gate electrode in the following process, which is not illustrated in
FIG. 1
, the polysilicon deposited at the corner portions of the trench may not be etched for thereby causing a short circuit.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method for isolating a semiconductor device which overcomes the aforementioned problems encountered in the conventional art.
It is another object of the present invention to provide a method for isolating a semiconductor device which is capable of increasing the densification of an insulation film filled into the trench for thereby enhancing the isolation characteristic of the device.
It is another object of the present invention to provide a method for isolating a semiconductor device which is capable of enhancing the isolation characteristic of the device by uniformly forming an insulation film in different size trenches formed in a cell region and a peripheral circuit region of the memory device.
To achieve the above objects, there is provided a method for isolating a semiconductor device according to a first embodiment of the present invention which includes the steps of forming a buffer film on a semiconductor substrate and an oxide prevention film on the buffer film, etching the buffer film and the oxide prevention film of a device isolation region, etching the substrate using the oxide prevention film as a mask and forming a trench, forming an oxidizable film on the surface of the trench, forming an insulation film filled into the trench by oxidizing the oxidizable film, and removing the buffer film and the oxide prevention film.
To achieve the above objects, there is provided a method for isolating a semiconductor device according to a second embodiment of the present invention which includes the steps of forming a buffer film on a semiconductor substrate and an oxide prevention film on the buffer film, removing the buffer film and the oxide prevention film from a first trench and a second trench wider than the first trench, forming a first trench and second trench by etching the substrate using the oxide prevention film as a mask, forming a first oxidizable film in the first trench and a second oxidizable film thicker than the first oxidizable film in the second trench, and forming a first insulation film and a second insulation film filling the first trench and the second trench, respectively, by oxidizing the oxidizable films.
Additional advantages, objects and features of the invention will become more apparent from the description which follows.
REFERENCES:
patent: 4493740 (1985-01-01), Komeda
patent: 5786263 (1998-07-01), Perera
patent: 6037237 (2000-03-01), Park et al.
patent: 6136664 (2000-10-01), Economikos et al.
“Chemical-mechanical polishing of interlayer dielectric: A review”, Iqbal Ali et al., Solid State Technology, Oct. 1994, pp. 63-68.
“HDP-CVD: Trying to lasso lightning ”, Ed Korczynski, Solid State Technology, Apr. 1996, pp. 64-73.
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
Jones Josetta
Niebling John F.
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