Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Complementary bipolar transistors
Reexamination Certificate
2005-08-23
2005-08-23
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Complementary bipolar transistors
C438S234000, C438S202000, C438S364000, C438S309000, C257S588000
Reexamination Certificate
active
06933202
ABSTRACT:
According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.
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Bashir, et al., “A Complimentary Bipolar Technology Family with a Vertical Integrated PNP for High-Frequency Analog Applications”, IEEE Transactions on Electron Devices, vol. 48, No. 11, Nov. 2001.
Hu Chun
Hurwitz Paul D.
Kalburge Amol
Ring Kenneth M.
Farjami & Farjami LLP
Newport Fab LLC
Tran Thanh Y.
Zarabian Amir
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