Method for integrating NVM circuitry with logic circuitry

Details Method for integrating NVM circuitry with logic circuitry Method for integrating NVM circuitry with logic circuitry

2007-10-29

2010-06-29

Pham, Thanh V (Department: 2894)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S401000, C257SE21023

Reexamination Certificate

active

07745344

ABSTRACT:
A method for integrating Non-Volatile Memory (NVM) circuitry with logic circuitry is provided. The method includes depositing a first layer of gate material over the NVM area and the logic area of the substrate. The method further includes depositing multiple adjoining sacrificial layers comprising nitride, oxide and nitride (ARC layer) overlying each other. The multiple adjoining sacrificial layers are used to pattern select gate and control gate of memory transistor in the NVM area, and the ARC layer of the multiple adjoining sacrificial layers is used to pattern gate of logic transistor in the logic area.

REFERENCES:
patent: 6271143 (2001-08-01), Mendicino
patent: 6410949 (2002-06-01), Wang et al.
patent: 6509235 (2003-01-01), Chien et al.
patent: 6559059 (2003-05-01), Chien et al.
patent: 6706593 (2004-03-01), Kodama
patent: 6707079 (2004-03-01), Satoh et al.
patent: 6875622 (2005-04-01), Markle
patent: 6964902 (2005-11-01), Steimle et al.
patent: 7151302 (2006-12-01), Chindalore
patent: 2004/0075133 (2004-04-01), Nakagawa et al.
patent: 2004/0124450 (2004-07-01), Yeap et al.
patent: 2007/0051952 (2007-03-01), Yamazaki et al.
patent: 10-2001-0027375 (2001-04-01), None
PCT/US2008/076750 International Search Report and Written Opinion mailed Apr. 10, 2009.

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