Method for integrating nanotube devices with CMOS for...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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C438S099000, C438S200000

Reexamination Certificate

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07871851

ABSTRACT:
A method is provided of integrating the formation of nanotube devices on the same substrate or wafer as CMOS devices in a standard CMOS process. During a CMOS formation process, a region of the substrate containing CMOS devices is protected from certain nanotube fabrication processes while fabricating nanotube devices on the substrate. After fabrication of the nanotube devices, the region of the substrate containing the fabricated nanotube devices is then protected from certain CMOS fabrication processes while fabricating CMOS devices on a different region of the same substrate. Through this formation method, a nanotube device based RF/analog system-on-chip (SoC) application can be formed having the superior RF/analog properties of nanotube electronic circuitry and the superior digital properties of silicon CMOS circuitry on the same wafer or substrate.

REFERENCES:
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patent: 2007/0102747 (2007-05-01), Chen et al.
patent: 2007/0197010 (2007-08-01), Hakey et al.
patent: 2009/0114903 (2009-05-01), Kalburge
patent: 10-2006-0029547 (2006-04-01), None
patent: 10-2007-0032389 (2007-03-01), None
Brock et al, “Carbon Nanotube Memories and Fabrics in a Radiation Hard Semiconductor Foundry”, p. 1-9 (2005).
Tseng et al, Nano Letters 4(1), 123 (2004).
Form PCT/ISA/210 in connection with PCT/US2008/064542 dated May 26, 2009.
Form PCT/ISA/237 in connection with PCT/US2008/064542 dated May 26, 2009.

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