Method for insulating semiconductor elements

Fishing – trapping – and vermin destroying

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437 61, 437 26, 437974, 216 56, H01L 2176

Patent

active

056863420

ABSTRACT:
A method for insulating semiconductor elements is disclosed. The method includes steps of: forming a 3-layer semiconductor substrate consisting of an upper conductive layer, a high concentration impurity layer, and a lower conductive layer; carrying out a photo etching to remove the upper conductive layer, thereby opening the high concentration impurity layer; dipping the semiconductor substrate into an aqueous HF solution of a certain ratio, and carrying out an anodizing reaction to convert the high concentration impurity layer into a porous silicon layer; and carrying out a wet oxidation to convert the porous silicon layer into a buried oxide layer.

REFERENCES:
patent: 4104090 (1978-08-01), Pogge
patent: 4532700 (1985-08-01), Kinney et al.
patent: 4810667 (1989-03-01), Zorinsky et al.
patent: 5023200 (1991-06-01), Blewer et al.

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