Method for inspecting wafer defects of a semiconductor device

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Mechanical measurement system

Reexamination Certificate

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C702S034000, C702S081000

Reexamination Certificate

active

06810334

ABSTRACT:

TECHNICAL FIELD
The present disclosure relates to a method for inspecting wafer defects of a semiconductor device and, more particularly, to a method for inspecting wafer defects of a semiconductor device, wherein the wafers are set up with reference coordinates for respective die, and wherein defects are classified by respective die.
BACKGROUND
Recently, with development of semiconductor technology, a process control has been coming to the front, together with a technology for device design and unit process.
In order to increase a production yield of a semiconductor, it is helpful to minimize defects of the semiconductor by improving the process technology.
Accordingly, a series of processes for inspecting various defects generated and distributed on wafer during production process, for analyzing inspected defects, and for utilizing the analyzed information as material for process establishment of manufacturing equipment may be used together with the development of optimized process technology.


REFERENCES:
patent: 5539752 (1996-07-01), Berezin et al.
patent: 6259960 (2001-07-01), Inokuchi
patent: 6334097 (2001-12-01), Yoshitake et al.

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