Method for increasing capacitance of deep trench capacitors

Semiconductor device manufacturing: process – Making passive device – Trench capacitor

Reexamination Certificate

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Details

C438S243000, C438S245000, C438S388000

Reexamination Certificate

active

06825094

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming deep trench capacitors, and more specifically to a method for increasing capacitance of deep trench capacitors.
2. Description of the Related Art
Generally speaking, capacitors widely used in dynamic random access memory (DRAM) are formed by two conductive layers (electrode plate) having an insulation layer between. The ability to store electric charges of a capacitor depends on the thickness of the insulation layer, surface area of the electrode plate and the electrical characteristics of the insulation material. In recent developments for reducing sizes of semiconductor elements to enhance integration density, the area of memory cells in a memory must continuously be reduced to support a larger number of memory cells, thereby increasing density. Meanwhile, the electrode plates of a capacitor in a memory cell must contain sufficient surface area to store sufficient electrical charges.
Nevertheless, with sizes of elements continuously reduced, the trench storage node capacitance of DRAM is decreased as well. As a result, the storage capacitance must be increased to maintain good operating performance.
Consequently, it is necessary to develop a method for increasing the storage capacitance, for example, etching the semiconductor substrate to enlarge surface area of the bottom of the trench, and then forming a bottle-shaped trench capacitor. Currently, the above method is widely used for increasing the storage capacitance of DRAM.
FIGS. 1A
to
1
C are cross-sections illustrating the conventional process flow for forming a bottle trench. First, referring to
FIG. 1A
, a patterned pad layer
12
is formed on a silicon substrate
10
. Then, the patterned pad layer
12
is used as an etching mask to etch the silicon substrate
10
by dry etching to form a trench
14
containing an upper portion
16
and a lower portion
18
. The dimension
13
′ of the trench
14
is formed.
Next, referring to
FIG. 1B
, a photoresist layer (not shown) covering the lower portion
18
of the trench
14
is deposited. A sacrificial layer
20
covering the upper portion
16
of the trench
14
and the pad layer
12
is deposited. Then, the photoresist layer (not shown) is removed and the sacrificial layer
20
on the pad layer
12
is removed by anisotropic etching later. Finally, the sacrificial layer
20
is formed in the upper portion
16
of the trench
14
.
Subsequently, referring to
FIG. 1C
, the silicon substrate
10
uncovered by the sacrificial layer
20
of the lower portion
18
of the trench
14
is etched by isotropic wet etching using ammonia and diluted hydrogen fluoride to form the lower portion
22
of the bottle-shaped trench
14
. The dimension
13
of the lower portion
22
is larger than the dimension
13
′ of the upper portion
16
of the trench
14
.
It is difficult to control the shape of the lower portion
22
of the trench
14
by the above method, and it results in increased instability and difficulty of the fabricating process.
SUMMARY OF THE INVENTION
In order to solve the conventional problems, an object of the invention is to provide a method for increasing the storage capacitance of a deep trench capacitor of a DRAM by enlarging surface area of the lower portion of the trench.
The invention forms a larger dimension of the trench at first to enlarge surface area of electrode plates of the capacitor, then narrows the dimension of the trench by forming an epitaxy layer on the sidewalls in the upper portion of the trench. Finally, the predetermined dimension is formed. The structure of the epitaxy layer is the same as the substrate, so that the electrical characteristics of the memory are maintained. The invention is formed as a bottle-shaped trench as well, thereby improving control of the shape of the bottom of the trench, further, increasing stability of the fabricating process.
The method for increasing the capacitance of the trench capacitors provided in the invention includes the following steps. First, a substrate is provided, and a pad structure is formed on the substrate. Next, a photoresist defining the deep trench is formed on the pad structure, and a deep trench is formed in the substrate. Subsequently, the photoresist is removed. A capacitor is formed in the lower portion of the deep trench. Next, a first insulation layer is formed on the capacitor, and an epitaxy layer is formed on the sidewalls of the deep trench above the first insulation layer as a liner to narrow the dimension of the deep trench. Finally, the first insulation layer uncovered by the epitaxy layer is removed.
A detailed description is given in the following embodiments with reference to the accompanying drawings.


REFERENCES:
patent: 6117726 (2000-09-01), Tsai et al.
patent: 6144054 (2000-11-01), Agahi et al.
patent: 6204527 (2001-03-01), Sudo et al.
patent: 6605504 (2003-08-01), JaiPrakash et al.

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