Method for increasing capacitance in DRAM capacitors and devices

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

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438255, H01L 2120

Patent

active

060339675

ABSTRACT:
The present invention discloses a method for increasing capacitance in DRAM capacitors by the operating steps of first providing a cavity in a semiconductor substrate, then depositing a first polysilicon layer in the cavity, and a metal layer on top of the polysilicon layer to form a silicide layer. The semiconductor substrate is then heat treated in a rapid thermal processing method so that the metal silicide layer forms an island structure on top of the first polysilicon layer. The first polysilicon layer can then be isotropically etched by using the metal silicide island structure as a mask to form an island structure in the first polysilicon layer. Additional dielectric layer and polysilicon layers are then deposited to form the insulating layer and the upper electrode for the capacitor. The increased surface area, i.e., approximately two times, of the lower electrode polysilicon layer greatly increases its storage area for the capacitor and therefore greatly improves its capacitance.

REFERENCES:
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patent: 5244842 (1993-09-01), Cathey et al.
patent: 5543347 (1996-08-01), Kawano et al.
patent: 5760434 (1998-06-01), Zahurak et al.
patent: 5766968 (1998-06-01), Armacost et al.

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