Method for improving via/contact coverage in an integrated circu

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438599, H01L 21768

Patent

active

056209169

ABSTRACT:
A method of improving via/contact coverage in an integrated circuit. A standard layout of an interconnect layer comprising plurality of interconnect lines is initially generated with well-known techniques. After generation of the initial layout, the amount of overlap of at least one via by an interconnect line is optimized by increasing the amount of overlap of each side of the via by the interconnect line wherever possible without violating a minimum line separation requirement.

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