Method for improving the readability of alignment marks

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

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438462, H01L 2176

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active

061534927

ABSTRACT:
The invention describes a method for improving the readability of alignment marks on semiconductor wafers during multilayer metallization. Metal located in the alignment marks is etched back for the purpose of uncovering the edges of the alignment marks after the deposition of metal and subsequent CMP step. In the alternative, the oxide in the immediate vicinity of the alignment marks is etched back in a recess etching step until the metal in the alignment mark is partly uncovered.

REFERENCES:
patent: 5640053 (1997-06-01), Caldwell
patent: 5663099 (1997-09-01), Okabe et al.
patent: 5786260 (1998-07-01), Jang et al.
patent: 5911108 (1999-06-01), Yen

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