Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-09-15
1999-08-24
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, 438435, 438437, 148DIG50, H01L 2176
Patent
active
059435909
ABSTRACT:
A method for improving the planarity of a semiconductor chip using chemical-mechanical polishing during a shallow trench isolation process is described. Specifically, an polish-stop layer, preferably of silicon nitride, is formed over a semiconductor wafer (or optionally formed over a pad oxide layer formed on the wafer). A cap layer, preferably of polysilicon, is then formed over the polish-stop layer. The active regions of the chip are defined, preferably using a photoresist mask by photolithography. The wafer, polish-stop and cap layers are then etched, between the active regions, to form shallow trenches. A lining dielectric layer, preferably an oxide, is formed over the etched and non-etched regions to fill the shallow trenches for isolation purposes. The dielectric layer has an etching rate at least three times greater than the etching rate of cap layer. When polysilicon is selected as the cap layer and oxide is selected as the dielectric layer, the selectivity rate is greater than ten. However, the conventional oxide dielectric
itride layer etching selectivity rate is less than three. Accordingly, the present invention provides a far greater etching selectivity rate than the prior art. In addition, the polish rate of the cap layer is much higher that that of the polish-stop layer. Therefore, the cap layer can be easily removed which reduces the CMP time while minimizing the dishing effect.
REFERENCES:
patent: 5459096 (1995-10-01), Venkatesan et al.
patent: 5578519 (1996-11-01), Cho
patent: 5736462 (1998-04-01), Takahashi et al.
Chen Yung-Shun
Wang Jyh-Lih
Dang Trung
Winbond Electronics Corp.
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