Data processing: structural design – modeling – simulation – and em – Emulation – In-circuit emulator
Reexamination Certificate
2000-03-21
2004-09-28
Teska, Kevin J. (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Emulation
In-circuit emulator
C703S023000, C703S024000, C712S209000, C712S023000
Reexamination Certificate
active
06799157
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a microcomputer, electronic equipment and emulation method.
2. Description of the Related Art
In recent years, there is an increased demand for microcomputers which can be incorporated into electronic equipment such as domestic game machines, car-navigation systems, printers, portable information terminals, portable telephones and which can realize a high information processing.
For such microcomputers, such a mass-produced product chip
700
as shown in
FIG. 1A
is made while at the same time such an evaluation chip
710
for program or system development as shown in
FIG. 1B
is formed. This evaluation chip
710
comprises normal external address and external data buses
702
,
704
connected to an external memory
706
such as a general-purpose memory, and dedicated address and data buses
712
.
714
to an emulation memory (or a memory for emulating an internal ROM
718
)
716
. More particularly, during development of a program, it is stored in the emulation memory
716
such as high-speed SRAM, without being stored in the internal ROM
718
. After the developed program has completely been debugged, the finished program will be stored in the internal ROM
718
. Because when the not-finished program is stored in the internal ROM
718
and the program has any change, the master pattern in the internal ROM
718
must be modified to renew it.
Thus, the evaluation chip
710
is provided with the address and data buses
712
,
714
dedicated to the emulation memory
716
. In this case, the number of pins in the evaluation chip
710
will increase in comparison with the number of terminals (or pins) in the product chip
700
. It is thus difficult to acquire a package in which the evaluation chip
710
can be mounted or it is complicated to keep the compatibility of terminals between the product and evaluation chips
700
.
710
. A further problem is that the program normally operated in the evaluation chip
710
will not operate in the product chip
700
.
SUMMARY OF THE INVENTION
In view of the technical problems of the prior art, it is an object of the present invention to provide a microcomputer, electronic equipment and emulation method which can realize the optimum circumstance of evaluation while saving the number of terminals.
To this end, one aspect of the present invention provides a microcomputer for performing information processing, comprising: a processor for executing instructions; an external bus being connectable to an emulation memory and at least one external memory other than the emulation memory; and bun control means for connecting a bus of the processor to the external bus so that an access of the processor to an internal memory will be switched to an access to the emulation memory through the external bus when the microcomputer is in an emulation mode.
The external bus (or external bus terminal) is provided to be connectable to the external memory and the emulation memory. Thus, the external bus can be shared between the external memory and emulation memory. When the emulation mode is ON, the access of the processor to the internal memory is switched to the access to the emulation memory through the external bus. Therefore, the processor operates based on the information stored in the internal memory when the emulation mode is OFF, while the processor operates based on the information stored in the emulation memory when the emulation mode is ON. Consequently, it is possible to perform an evaluation such as program development by the use of the emulation memory. In addition, the emulation memory in accessed through the external bus for the other external memory without providing any bus dedicated to the emulation memory. Although particularly not restricted, the same configuration can be used between the terminals of the evaluation and product microcomputers. This can realize the optimum circumstance of evaluation while saving the number of terminals in the microcomputer.
The external bus is sufficient to connect with the external memory and the emulation memory. Thus, in the finished product, for example, it is not necessary to connect the emulation memory with the external bus.
The access of the processor to the internal memory is sufficient to the access to any area of memory space to which the internal memory has been allocated. Thus, when the microcomputer is on evaluation, for example, it is not necessary that the internal memory is actually included in the microcomputer.
The present invention can equivalently be applied to microcomputers which are to arbitrarily exclude the necessary circuit for emulation or to cancel the emulation function, when the microcomputer is on production.
The microcomputer of the present invention may comprise a made selection terminal for selecting ON or OFF of the emulation mode. Thus, the emulation mode can be turned off when the microcomputer is on mass production without re-writing information such as a program stored in the internal memory or the like.
The microcomputer of the present invention may further comprise a mode selection register for storing information used to select ON or OFF of the emulation mode, and being accessible by the processor. Thus, the emulation mode can be switched from ON to OFF or vice versa in a software manner without changing the signal setting to the terminals of the microcomputer.
An address bus of the processor may be connected to an external address bus and an address bus of the internal memory without dependent on ON/OFF of the emulation mode, and a data bus of the processor may be connected to an external data bus when the emulation mode becomes ON.
The microcomputer of the present invention may further comprise memory control means for outputting a first control signal for controlling the external memory connected to the external bus and a second control signal for controlling the emulation memory connected to the external bus, the second control signal being different from the first control signal. Thus, the emulation memory can be controlled by the second control signal which is different from the first control signal for controlling the external memory. Consequently, the emulation memory can properly be accessed even through the external bus to which the external memory is connected.
In the microcomputer of the present invention, the second control signal may include a second memory read signal which becomes active at a timing earlier than that of a first memory read signal included in the first control signal. Thus, the microcomputer can easily deal with such a constraint that the processor must fetch and decode an instruction stored in the emulation memory within one clock cycle, for example.
The microcomputer of the present invention may further comprise a mode selection terminal for selecting a first mode and a second mode, the emulation memory being first accessed by the processor after reset in the first mode, and the internal memory being first accessed by the processor after reset in the second mode. Thus, the first mode can be selected when the microcomputer is on evaluation while the second mode can be selected when the microcomputer is on production (or on actual operations). This can improve the efficiency on evaluation such as program development or the like.
In the microcomputer of the present invention, the mode selection terminal may be capable of selecting a third mode in which the external memory is first accessed by the processor after reset Thus, the microcomputer can be booted from the external memory to meet the requirements of broadly ranging users.
In the microcomputer of the present invention, the mode selection terminal may be capable of selecting a fourth mode in which information is transmitted from the external memory to the emulation memory after reset and thereafter the emulation memory is first accessed by the processor. This can avoid such a complicated operation that information must be downloaded to the emulation memory each time when information has disappe
Kudo Makoto
Miyayama Yoshiyuki
Terasawa Hirofumi
Ferris Fred
Seiko Epson Corporation
Teska Kevin J.
LandOfFree
Method for improving pin compatibility in microcomputer... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for improving pin compatibility in microcomputer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for improving pin compatibility in microcomputer... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3239483