Method for improved interrupt processing in a computer system

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395742, G06F 946, G06F 1314

Patent

active

058812962

ABSTRACT:
A method and apparatus for reducing the number of interrupts issued by a first device to a second device in a computer system. A delay interval is specified to the first device, the delay interval indicating an amount of time for the first device to wait after receiving data from the second device before issuing an interrupt to the second device. The first device issues the interrupt immediately after receiving the data from the second device when the specified delay is zero. When the delay is non-zero, the first device is scheduled to interrupt the second device after the delay interval expires. If a second unit of data is received from the second device before the delay interval expires, the scheduled interrupt is canceled. Otherwise, the interrupt is issued immediately after the delay interval expires.

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