Method for implementation of back-illuminated CMOS or CCD...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S057000, C438S149000, C257SE33068

Reexamination Certificate

active

07425460

ABSTRACT:
A method for implementation of back-illuminated CMOS or CCD imagers. An oxide layer buried between silicon wafer and device silicon is provided. The oxide layer forms a passivation layer in the imaging structure. A device layer and interlayer dielectric are formed, and the silicon wafer is removed to expose the oxide layer.

REFERENCES:
patent: 4422091 (1983-12-01), Liu
patent: 4656519 (1987-04-01), Savoye
patent: 4774557 (1988-09-01), Kosonocky
patent: 5122669 (1992-06-01), Herring et al.
patent: 5134274 (1992-07-01), Poole et al.
patent: 5227313 (1993-07-01), Gluck et al.
patent: 5244817 (1993-09-01), Hawkins et al.
patent: 5424574 (1995-06-01), Morgante
patent: 5688715 (1997-11-01), Sexton et al.
patent: 5907767 (1999-05-01), Tohyama
patent: 5940685 (1999-08-01), Loomis
patent: 6040591 (2000-03-01), Otsuka
patent: 6168965 (2001-01-01), Malinovich et al.
patent: 6169319 (2001-01-01), Malinovich et al.
patent: 6204506 (2001-03-01), Akahori et al.
patent: 6242730 (2001-06-01), Lin et al.
patent: 6259085 (2001-07-01), Holland
patent: 6429036 (2002-08-01), Nixon et al.
patent: 6498073 (2002-12-01), Sarma et al.
patent: 6498336 (2002-12-01), Tian et al.
patent: 6809008 (2004-10-01), Holm et al.
patent: 6927432 (2005-08-01), Holm et al.
patent: 6989569 (2006-01-01), Hiramoto et al.
patent: 2001/0019164 (2001-09-01), Yin
patent: 2001/0026001 (2001-10-01), Yagi
patent: 2002/0084474 (2002-07-01), Sarma et al.
patent: 2003/0025160 (2003-02-01), Suzuki et al.
patent: 2003/0038289 (2003-02-01), Yamakazi
patent: 2003/0214595 (2003-11-01), Mabuchi
patent: 2003/0222204 (2003-12-01), Gidon
patent: 2004/0233503 (2004-11-01), Kimura
patent: 2005/0074954 (2005-04-01), Yamanaka
patent: 2005/0104148 (2005-05-01), Yamamoto et al.
patent: 2006/0057764 (2006-03-01), Pan et al.
patent: 2006/0244067 (2006-11-01), Socher et al.
patent: 198 38 373 (2000-03-01), None
patent: 2004/134672 (2004-04-01), None
patent: 2004/054001 (2004-06-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for implementation of back-illuminated CMOS or CCD... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for implementation of back-illuminated CMOS or CCD..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for implementation of back-illuminated CMOS or CCD... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3967563

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.