Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
2000-10-17
2003-09-02
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S108000, C700S109000, C438S014000
Reexamination Certificate
active
06615101
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention pertains in general to a computer-implemented method for comparing performances of semiconductor manufacturing tools, and, more particularly, to a computer-implemented method for identifying the best tool in a semiconductor fabrication line.
2. Description of the Related Art
A semiconductor device is manufactured in a fabrication line with a process that comprises a series of steps. The performance of the fabrication line may be measured in terms of yield, measuring the number of acceptable dies manufactured from a wafer. For example, a 90% yield indicates that out of every 100 dies on a wafer processed by the fabrication line, 90 dies meet the specifications required for the manufacture of the processed wafers. The remaining 10 dies are rejected and discarded. Obviously, the cost of fabricated dies increases when some of the processed wafers are discarded. Therefore, it is desirable to have a highest yield possible for a semiconductor fabrication line.
Sometimes a process step in a fabrication line is performed by a plurality of equipment, or tools. Although these tools perform the same function in carrying out the same process step, the performance of the tools may differ because, for example, they may be manufactured by different manufacturers, or different generations of the same tool manufactured by the same manufacturer. The performance of the tools may also differ because of systematic errors, which indicate one or more of the tools require adjustment or repair. Therefore, tool performance is monitored to improve the yield of the fabrication line.
To ascertain the relative performance of these tools, process engineers and yield engineers periodically monitor the yield for each of the tools and rank the tools accordingly. Specifically, the engineers monitor the yield performance of each tool by comparing the yield performance of each tool to the yield performance of the entire semiconductor fabrication line. Particular abnormal events that adversely affect the yield are accounted for and taken into consideration. The engineers also keep track of the total number of wafers processed by the fabrication line and the individual tools. Together with previous performance data, the engineers tan identify the “best” tool and flag any systematic difference of the tools. Once a systematic difference is identified, the engineers will then adjust and repair the tools as required.
However, this process is time consuming and considerable historical data about wafer-in-process (“WIP”) numbers are required to compare the performance of the tools. As a result, instead of concentrating on locating and fixing systematic errors of the tools, much of the effort of the engineers is spent compiling and comparing the data.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a computer-implemented method for identifying the best tool in a fabrication line that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the computer-implemented methods particularly pointed out in the written description and claims hereof, as well as the appended drawings.
To achieve these and other advantages, and in accordance with the purpose of the invention as embodied and broadly described, there is provided a computer-implemented method for identifying a best tool from a plurality of tools that perform a same operation in a semiconductor fabrication line that includes the steps of determining a first median yield for each of the plurality of tools within a first time interval, weighting the first median yield based on a total number of wafers processed by each of the plurality of tools within the first time interval, determining a second median yield for the semiconductor fabrication line over the first time interval, obtaining a weighted yield difference for each of the plurality of tools relative to the second median yield, and outputting the weighted yield difference for each of the plurality of tools.
In one aspect of the invention, the computer-implemented method further includes a step of comparing the weighted first median yield for each of the plurality of tools to the second median yield of the semiconductor fabrication line.
In another aspect of the invention, the computer-implemented method further includes the steps of determining a third median yield for each of the plurality of tools within a second time interval, weighting the third median yield based on a total number of wafers processed by each of the plurality of tools within the second time interval, determining a fourth median yield for the semiconductor fabrication line over the second time interval, comparing the weighted third yield for each of the plurality of tools relative to the fourth median yield of the semiconductor fabrication line, and outputting weighted differences between the third and fourth median yields.
In still another aspect of the invention, the step of outputting includes a step of identifying the best tool as a tool as having a largest weighted yield difference.
Also in accordance with the present invention, there is provided a computer-implemented method for identifying a best tool within a plurality of tools that perform a same operation within a semiconductor fabrication line that includes the steps of determining a first median yield for each of the plurality of tools within a first time interval, determining a second median yield for the semiconductor fabrication line over the first time interval, obtaining a yield difference for each of the plurality of tools relative to the second median yield, weighting the yield difference based on a total number of wafers processed by each of the plurality of tools within the first time
Further in accordance with the present invention, there is provided a computer-readable medium storing instructions executable by a processor for identifying a best tool from a plurality of tools that perform a same operation in a semiconductor fabrication line. The computer-executable instructions include determining a first median yield for each of the plurality of tools within a first time interval, determining a second median yield for the semiconductor fabrication line over the first time interval, obtaining a yield difference for each of the plurality of tools relative to the second median yields, weighting the yield difference based on a total number of wafers processed by each of the plurality of tools within the first time interval, and outputting the yield difference for each of the plurality of tools.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6041267 (2000-03-01), Dangat et al.
patent: 6319733 (2001-11-01), Ozaki
Nicholson Mark
Rettelbach Michael
Finnegan Henderson Farabow Garrett & Dunner LLP
Kasenge Charles
Picard Leo
ProMos Technologies Inc.
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