Method for identification of parasitic transistor devices in an

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364489, 324158T, G06F 1570

Patent

active

048170127

ABSTRACT:
In order to identify parasitic transistors in bipolar integrated circuit structures, files relating to the parameters of the simulated circuit are established. These files are then manipulated to establish the operating parameters of the simulated circuit. These operating parameters are then examined to identify the conditions that lead to circuit degradation due to parasitic transistors. The structure in the integrated circuit that result in the parasitic transistors are then highlighted on the circuit display in order to facilitate appropriate design changes.

REFERENCES:
patent: 4520448 (1985-05-01), Tremintin
patent: 4635208 (1985-01-01), Coleby et al.
Paul Groner; "Computer Aided Design of VLSI Saves Man-Hours, Reduces Errors", 4/81, pp. 55-57.
Kuo et al., "Computer Oriented Circuit Design", 1969, Chapter 1.

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