Method for high-temperature annealing a multilayer wafer

Details Method for high-temperature annealing a multilayer wafer Method for high-temperature annealing a multilayer wafer

2007-07-13

2009-06-09

Wilson, Gregory A (Department: 3749)

Heating

Processes of heating or heater operation

Subjecting work to diverse treatments or graduated temperatures

C432S005000, C432S012000

Reexamination Certificate

active

07544058

ABSTRACT:
A method for annealing a multilayer wafer by subjecting the wafer to a high temperature treatment that includes at least a temperature ramp-up between a boat-in temperature and a process of at least 800° C.; at least a processing phase in the range conduct at or above the process temperature; and a temperature ramp-down from the processing phase to a boat-out temperature. The boat-in temperature is sufficiently lower than the boat-out temperature to reduce or avoid tearing-off defects on the wafer and to reduce particle contaminants on the wafer, as well as to reduce or avoid degrading wafer Dit compared to an annealing method where the boat-in and boat-out temperatures are closer in temperature.

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J.P. Colinge, “Silicon On Insulator Technologies Materials to VLSI”, pp. 50-51, Sep. 30, 1997.

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