Method for high-speed programming of a nonvolatile semiconductor

Details Method for high-speed programming of a nonvolatile semiconductor Method for high-speed programming of a nonvolatile semiconductor

1998-02-20

1999-08-24

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Multiple values

36518511, 36518519, 36523003, G11C 700

Patent

active

059432608

ABSTRACT:
A flash EEPROM has a plurality of multi-valued memory cells grouped in a plurality blocks or pages for parallel programming. If the data values for parallel programming include data "10" for a first group, data "01" for a second group and data "00" for a third group of memory cells in a page, a first voltage corresponding to data "10" is applied to the first through third groups, a second voltage corresponding to data "01" is applied to the second and the third groups, and a third voltage corresponding to data "00" is applied to the third groups, thereby reducing the programming time length for the parallel programming.

REFERENCES:
patent: 5764571 (1998-06-01), Banks
patent: 5815436 (1998-09-01), Tanaka et al.
patent: 5815439 (1998-09-01), Korsh et al.

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