Excavating
Patent
1994-12-02
1995-08-08
Beausoliel, Jr., Robert W.
Excavating
371 48, 395839, 39518319, 39518519, G06F 1100
Patent
active
054407290
ABSTRACT:
A channel unit is provided between a central computer and a peripheral and includes a plurality of registers for data transfer therebetween. In the event that an error occurs in one of the registers, a processor provided in the channel unit terminates a normal data transfer operation and freezes all the registers. A content of each of the freezed registers is stored, as the error information, into a memory which is provided in the channel unit. The central computer is advised of the error occurrence and issues a reset signal which releases the freezing of the registers. The channel unit receives an instruction, from the central computer, for transferring the error information stored in the memory. The error information stored in the memory is transferred to the central computer, via a data channel, in response to the instruction applied.
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Kimura Toshio
Tanimichi Tatsuhiko
Beausoliel, Jr. Robert W.
De'cady Albert
NEC Corporation
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