Method for gold plating of metallic layers on semiconductive dev

Details Method for gold plating of metallic layers on semiconductive dev Method for gold plating of metallic layers on semiconductive dev

1975-05-19

1977-01-25

Tufariello, T. M.

Chemistry: electrical and wave energy

Apparatus

Coating, forming or etching by sputtering

204 15, 427 88, 427 92, H01L 2946, H01L 2348

Patent

active

040054721

ABSTRACT:
An integrated circuit semiconductive device has a plurality of copper gang bonding bumps formed on the upper surface thereof. The bumps rise substantially above the surface of the semiconductive device and serve to make electrical connection to a pattern of intraconnect metallization formed on the semiconductive device for making electrical contact to various regions within the semiconductive body of the integrated circuit. The gang bonding bumps are to be thermal compression bonded to metallic leads by an automatic bonding machine. As a final step to the processing of the semiconductive wafers, containing the individual semiconductive devices, the wafers are immersed in an immersion gold plating solution for plating an antioxidant protective coating of gold of a thickness less than 6000 angstroms onto the copper gang bonding bumps to prevent oxidation thereof either before or during the gang bonding step. The thickness of such gold antioxidant coating permitting thermal compression bonding therethrough to the underlying metal layer.

REFERENCES:
patent: 3099576 (1963-07-01), Mocann
patent: 3162512 (1964-12-01), Robinson
patent: 3214292 (1965-10-01), Edson
patent: 3436818 (1969-04-01), Merrin et al.
patent: 3461357 (1969-08-01), Mutter et al.
patent: 3523038 (1970-08-01), Sanders
IBM Tech Disclosure Bulletin vol. 8 No. 3 Aug. 1965 p. 452.
RCA Technical Notes RCA June 1960.

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