Semiconductor device manufacturing: process – Having organic semiconductive component
Reexamination Certificate
1999-09-28
2002-06-11
Sherry, Michael J. (Department: 2829)
Semiconductor device manufacturing: process
Having organic semiconductive component
Reexamination Certificate
active
06403396
ABSTRACT:
The invention concerns a method for generating electrical conducting or semiconducting structures in three dimensions in a composite matrix, wherein the matrix comprises two or more materials provided in spatially separate and homogenous material structures and wherein the materials in response to the supply of energy can undergo specific physical and/or chemical changes of state which cause transition from an electrical non-conducting state to an electrical conducting or semiconducting state or vice versa, or a change in the electrical conduction mode of the material. The invention also concerns methods for erasing electrical conducting or semiconducting structures generated in three dimensions in a composite matrix, wherein the matrix comprises two or more material provided in spatially separated and homogenous material structures, wherein the materials in response to the supply of energy can undergo specific physical and/or chemical changes of state which cause transitions from an electrical non-conducting state to an electrical conducting or semiconducting state or vice versa or a change in the electrical conduction mode of the material, wherein each material structure comprises a generated pattern of substantially two-dimensional electrical conducting or semiconducting structures represented by a determined protocol, and wherein electrical conducting or semiconducting structures in three dimensions can be generated anew in the matrix after erasure with the use of the method as stated in any of the claims
1
-
5
and
12
-
22
and according to another determined protocol for two-dimensional electrical conducting or semiconducting structures in each material structure, and a method for erasing globally electrical conducting or semiconducting structures generated in three dimensions in a composite matrix, wherein the matrix comprises two or more materials provided in spatially separate and homogenous material structures, wherein the materials in response to the supply of energy can undergo physical and/or chemical changes of states which cause transitions from an electrical non-conducting state to an electrical conducting or semiconducting state and vice versa or a change in the electrical conduction mode of the material, wherein electrical conducting or semiconducting structure in three dimensions can be generated anew in the matrix after erasing by using the method as stated in any of the claims
1
-
5
and
12
-
22
and according to another determined protocol for two-dimensional electrical conducting or semiconducting structures in each material structure.
More particularly the present invention concerns the fabrication of two- and three-dimensional isolating, resistive, conducting or semiconducting patterns and structures for use in electronic circuits which most particularly consist of a single or several stacked layers of thin films.
The evolution of microelectronic technology shows a steady trend towards smaller dimensions and reduced costs of the devices. Well-substantiated predictions show that the performance is going to increase, while the price per unit or device will decrease. However, today's microelectronic technology is substantially based on crystalline silicon and shows an increasing tendency towards diminishing returns, mainly due to the inherent limitations associated with the complexity of ultra-high resolution lithography and increasing demands of the material processing. Extrapolations of the present technologies based on crystalline silicon may hence not be expected to offer dramatic breakthroughs in regard of either performance or price and future improvements shall require manufacturing plants and manufacturing equipment which are extremely capital-intensive.
Microelectronics based on thin-film technology may on the other hand confidently be predicted to deliver in the near future products representing real breakthroughs in regard of performance as well as of price. The shift from crystalline inorganic semiconductors to microcrystalline, polycrystalline or amorphous inorganic or organic semiconductors will introduce entirely novel boundary conditions with regard to the production of microelectronics and particularly by the blanks having form factors which make large areas possible, i.e. the substrates may be large sheets instead of wafers cut from blanks of limited size, and great flexibility with regard to architectures, something which will be essential factors in the expected development of tomorrow's electronic technology. In the present invention special emphasis will be placed on the use of organic materials due to the ease whereby they may be processed with basis in the use of large areas and multilayer blanks with precisely controllable thickness, as well as their vast potential for chemical tailoring of the desired material properties.
Particularly before the use of electronics based on amorphous materials can fulfil their expected potential, further developments in certain areas are required. In the recent years an effort has been made to improve the semiconducting properties of organic semiconducting thin-film materials, which have given dramatic and rapid increase in the transistor performance up to a point where organic-based transistors may now compete with transistors based on amorphous silicon (see for instance Y.-Y. Lin, D. J. Gundlach, S. F. Nelson and T. N. Jackson, “Pentacene-Based Organic Thin Film Transistors”, IEEE Transactions on Electron Devices, August 1997). Other on-going projects will lead to coating processes for thin film in order to generate organic and amorphous silicon semiconductors at low temperatures and with compatibility with a broad range of organic and inorganic substrate materials. This has lead to the development of extremely cheap electronic devices with large areas based on the use of high-volume manufacturing methods.
In spite of this development a wholly satisfactory solution to how the fabrication technology shall be adapted and made suitable for a low-cost flexible high-volume production of electrical connections in the thin-film structures forming the electronic circuits is still lacking. Currently thin-film devices are based on amorphous silicon manufactured with current paths and conductors patterned with traditional methods such as lithography and vacuum metallization. The latter method has formerly also been applied to circuits for demonstration of organic-based semiconductor thin-film devices (see for instance A. R. Brown & al. “Logic gates made from polymer transistors and their use of ring oscillators”, Science 270: 972-974 (1995)). Alternatively, screen printing with conducting “ink” has been used to make transistors on flexible polymer substrates (see for instance F. Garnier & al., “All-polymer field-effect transistor realized by printing techniques”, Science 265:1884-1886 (1994)). Even though lithography may provide high resolution, it is relatively complex and includes typically wet chemistry steps which are undesirable in high-volume production of multilayer organic thin-film structures. Screen printing with ink is also far from ideal, as it only provides low to moderate resolution besides being a “wet” method.
As examples of prior art such it is evident from available patent literature may also be mentioned U.S. Pat. No. 5,043,251 (Sonnenschein et al.) which discloses a process for three-dimensional lithography of amorphous polymers for generating a momentary permanent pattern in a polymer material and which comprises steps for providing doped non-crystalline layers or films of a polymer in a stable amorphous state under humane operating conditions. In manufacturing the patterns the film is masked optically and is exposed through the mask to radiation with sufficient intensity to cause ablation of the exposed portions such that a distinct three-dimensional imprint is generated in the film. This process has among other been proposed for use in the manufacture of an optical data storage disk. Further it is from U.S. Pat. No. 5,378,916 (Mantell) known a photo-sensitive device in
Gudesen Hans Gude
Leistad Geirr I.
Nordal Per-Erik
Sarkar Asok Kumar
Sherry Michael J.
Thin Film Electronics ASA
LandOfFree
Method for generation of electrically conducting or... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for generation of electrically conducting or..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for generation of electrically conducting or... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2972554