Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2007-02-20
2007-02-20
Huynh, Andy (Department: 2818)
Semiconductor device manufacturing: process
With measuring or testing
C700S097000
Reexamination Certificate
active
10840099
ABSTRACT:
A method and program is disclosed for generating work in progress (WIP) schedules in semiconductor manufacturing facility. After determining starting and ending dates of predetermined schedule periods for generating WIP schedules, remaining days are determined for completing at least one wafer lot associated with predetermined product from the starting date. A starting process stage for the wafer lot is determined at the starting date based on the remaining days, and an ending process stage for the wafer lot at the end of the ending date. Wafer numbers are assigned to each process stage of schedule times in proportion to process times of each stage in view of total process time for the schedule period, and by repeating the above steps for one or more other wafer lots under production, a total wafer number assigned to each stage is determined and the WIP schedule for the schedule period is obtained.
REFERENCES:
patent: 6438436 (2002-08-01), Hohkibara et al.
Fang Gwo-Chiang
Huang Shu Chen
Duane Morris LLP
Huynh Andy
Nguyen Thinh T.
Taiwan Semiconductor Manufacturing Company
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