Method for generating unique addresses for electrical devices fr

Details Method for generating unique addresses for electrical devices fr Method for generating unique addresses for electrical devices fr

1995-08-15

1998-04-14

Harvey, Jack B.

395828, 395829, 395830, G06F 1200, G06F 1300

Patent

active

057403791

ABSTRACT:
A method for assigning addresses for an assembly of an electrical device, provides that the assembly be supplied electronically with an input bit pattern (for example 101) consisting of a number of logical ones and a number of logical zeros. This input bit pattern (101) is then compared to admissible bit patterns (101, 110, 011). When the input bit pattern (101) conforms with one of the admissible bit patterns (101, 110, 011), an address (01) assigned to the input bit pattern (101) is determined, under which the assembly is then able to function in response to a bus system, and the assembly is then activated. The number of ones of all admissible bit patterns (101, 110, 011) are the same. On the basis of the input bit pattern (101), the assembly determines an output bit pattern (011) consisting of a number of logical ones and a number of logical zeros and making available this output bit pattern (011) for a downstream assembly.

REFERENCES:
patent: 4727475 (1988-02-01), Kiremidjian
patent: 5179670 (1993-01-01), Farmwald et al.
patent: 5317693 (1994-05-01), Cuenod et al.
patent: 5404460 (1995-04-01), Thomsen et al.
patent: 5437019 (1995-07-01), Brockmann
patent: 5530895 (1996-06-01), Enstrom
patent: 5530896 (1996-06-01), Gilbert
patent: 5553245 (1996-09-01), Su et al.
IBM Technical Disclosure Bulletin, Aug. 1979, "Selective Addressing of Devices Using Primitive Polynomial Transformations".

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