Method for generating clock and clock generating circuit

Details Method for generating clock and clock generating circuit Method for generating clock and clock generating circuit

1998-10-30

2000-12-12

Lam, Tuan T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327299, 327141, 327294, H03L 700

Patent

active

06160433&

ABSTRACT:
A first clock and a second clock are provided. The first and second clocks operate at first and second frequencies, respectively. The phase difference between the first clock and the second clock is accumulated to generate a control signal. In response to the control signal, the phase of the second clock is controlled so as to synchronize with the first clock. Preferably, the phase of the second clock is shifted from the normal timing, when the accumulated value reaches a cycle of the first clock.

REFERENCES:
patent: 4837781 (1989-06-01), Hickling
patent: 5065115 (1991-11-01), Pletz-Kirsh et al.
patent: 5781044 (1998-07-01), Riley et al.

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