Method for generating an optimized integrated circuit cell libra

Details Method for generating an optimized integrated circuit cell libra Method for generating an optimized integrated circuit cell libra

1996-01-22

1998-09-01

Teska, Kevin J.

G06F 9455, G06F 1750

Patent

active

058023496

ABSTRACT:
A cell library (21) is optimized for specific operating characteristics. A stimulus file (23) is divided into a number of simulation run files. The simulation run files (27) are distributed to more than one computer work station so that the simulation of the cell occurs in parallel. The netlist (24) of each cell is parameterized to allow the cell to be changed and resimulated to better meet the specific operating characteristics. A cost function (32) is provided which uses the results of a transistor level simulation to calculate the quality of the cell design relative to the specific operating characteristics. Simulated annealing (34) is used to generate new simulation parameter values from a cost generated from the cost function (32). The cell is resimulated a number of times to optimize for the specific operating characteristics and the best design is retained for a new cell library (39). The process is repeated for each cell of the cell library (21).

REFERENCES:
patent: 5349536 (1994-09-01), Ashtaputre et al.
patent: 5495419 (1996-02-01), Rostoker
patent: 5566078 (1996-10-01), Ding et al.
patent: 5619419 (1997-04-01), D'Haeseleer et al.
S. Kirkpatrick, C.D. Gelatt, Jr., and M.P. Vecchi, "Optimization by Simulated Annealing", Science, 220, May 13, 1983 pp. 671-680.

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