Method for full wafer contact probing, wafer design and...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S765010

Reexamination Certificate

active

10990420

ABSTRACT:
A technique to simplify the cost and complexity of performing a full wafer test or probe of semiconductor wafers. A probe card connection layer is disposed on a surface of the wafer. The probe card connection layer comprises a plurality of probe contact connection points on a top surface of the probe card connection layer and a plurality of conductive traces on a bottom surface of the probe card connection layer. Each conductive trace is electrically connected to a corresponding probe contact connection point and electrically connected to a similar function connection point on each of a plurality of chips. Each conductive trace carries a test signal supplied to a corresponding probe contact connection point to the similar function connection points of the chips to which it is connected. A test signal can be delivered from a probe card device to multiple chips in the wafer nearly simultaneously from one probe card contact, thus greatly reducing the number of contacts required on the probe card and reducing the time required to test each chip on the wafer.

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