Method for forming void-free trench isolation layer

Details Method for forming void-free trench isolation layer Method for forming void-free trench isolation layer

2006-08-14

2008-09-16

Hoang, Quoc D (Department: 2892)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C257SE21545, C257SE21628

Reexamination Certificate

active

07425494

ABSTRACT:
Disclosed method for forming void-free isolation comprises the steps of: forming a trench in an isolation region in a semiconductor substrate; and forming a filling oxide on the semiconductor substrate to fill the trench. The filling oxide is formed by HDP-CVD process and by using reactant gas mixture that includes O2, SiH4and He. In an embodiment of the present invention, the formation of the filling oxide is carried out in two-step process which includes: first filling the trench with the filling oxide under the first processing condition that a first D/S value has a greater deposition rate than sputter etching rate; and second filling the trench with the filling oxide under the second processing condition that a second D/S value is smaller than the first D/S value. Here the D/S value is defined as “(net deposition rate+blanket sputter etching rate)/(blanket sputter etching rate)”.

REFERENCES:
patent: 6914316 (2005-07-01), Yun et al.
patent: 6989337 (2006-01-01), Chu et al.

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